From a3bb99a03f18a6375d2bd74957a14fae4af36a8a Mon Sep 17 00:00:00 2001 From: Inki Dae Date: Fri, 23 Nov 2018 16:18:36 +0900 Subject: [PATCH] ARM: dts: exynos: change vpll clock to 600MHz This change enhances MALI inference(on-device deep leanring) performance. Change-Id: I2a9341589873a049bd91ee6771c96d831768df3c Signed-off-by: Inki Dae --- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 6ebd184ce5e3..652274eaf7b3 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -422,6 +422,8 @@ &mali { mali-supply = <&buck4_reg>; + assigned-clocks = <&clock CLK_FOUT_VPLL>; + assigned-clock-rates = <600000000>; status = "okay"; }; -- 2.34.1