From a367285f64be4fe27e5330666c40921f9b2f7fd3 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Mon, 14 Jan 2019 13:47:07 +0000 Subject: [PATCH] [X86] Add add/sub saturation undef tests. llvm-svn: 351066 --- llvm/test/CodeGen/X86/combine-add-ssat.ll | 30 +++++++++++++++++++++++++++ llvm/test/CodeGen/X86/combine-add-usat.ll | 26 +++++++++++++++++++++++ llvm/test/CodeGen/X86/combine-sub-ssat.ll | 34 +++++++++++++++++++++++++++++-- llvm/test/CodeGen/X86/combine-sub-usat.ll | 30 +++++++++++++++++++++++++-- 4 files changed, 116 insertions(+), 4 deletions(-) diff --git a/llvm/test/CodeGen/X86/combine-add-ssat.ll b/llvm/test/CodeGen/X86/combine-add-ssat.ll index 74b4318..bd06ae9 100644 --- a/llvm/test/CodeGen/X86/combine-add-ssat.ll +++ b/llvm/test/CodeGen/X86/combine-add-ssat.ll @@ -11,6 +11,36 @@ declare i32 @llvm.sadd.sat.i32 (i32, i32) declare i64 @llvm.sadd.sat.i64 (i64, i64) declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>) +; fold (sadd_sat x, undef) -> -1 +define i32 @combine_undef_i32(i32 %a0) { +; CHECK-LABEL: combine_undef_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: movl %edi, %ecx +; CHECK-NEXT: addl %eax, %ecx +; CHECK-NEXT: setns %al +; CHECK-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF +; CHECK-NEXT: addl %eax, %edi +; CHECK-NEXT: cmovnol %edi, %eax +; CHECK-NEXT: retq + %res = call i32 @llvm.sadd.sat.i32(i32 %a0, i32 undef) + ret i32 %res +} + +define <8 x i16> @combine_undef_v8i16(<8 x i16> %a0) { +; SSE-LABEL: combine_undef_v8i16: +; SSE: # %bb.0: +; SSE-NEXT: paddsw %xmm0, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: combine_undef_v8i16: +; AVX: # %bb.0: +; AVX-NEXT: vpaddsw %xmm0, %xmm0, %xmm0 +; AVX-NEXT: retq + %res = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> undef, <8 x i16> %a0) + ret <8 x i16> %res +} + ; fold (sadd_sat c1, c2) -> c3 define i32 @combine_constfold_i32() { ; CHECK-LABEL: combine_constfold_i32: diff --git a/llvm/test/CodeGen/X86/combine-add-usat.ll b/llvm/test/CodeGen/X86/combine-add-usat.ll index b69bdd5..260d6ba 100644 --- a/llvm/test/CodeGen/X86/combine-add-usat.ll +++ b/llvm/test/CodeGen/X86/combine-add-usat.ll @@ -11,6 +11,32 @@ declare i32 @llvm.uadd.sat.i32 (i32, i32) declare i64 @llvm.uadd.sat.i64 (i64, i64) declare <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16>, <8 x i16>) +; fold (uadd_sat x, undef) -> -1 +define i32 @combine_undef_i32(i32 %a0) { +; CHECK-LABEL: combine_undef_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: addl %eax, %edi +; CHECK-NEXT: movl $-1, %eax +; CHECK-NEXT: cmovael %edi, %eax +; CHECK-NEXT: retq + %res = call i32 @llvm.uadd.sat.i32(i32 %a0, i32 undef) + ret i32 %res +} + +define <8 x i16> @combine_undef_v8i16(<8 x i16> %a0) { +; SSE-LABEL: combine_undef_v8i16: +; SSE: # %bb.0: +; SSE-NEXT: paddusw %xmm0, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: combine_undef_v8i16: +; AVX: # %bb.0: +; AVX-NEXT: vpaddusw %xmm0, %xmm0, %xmm0 +; AVX-NEXT: retq + %res = call <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16> undef, <8 x i16> %a0) + ret <8 x i16> %res +} + ; fold (uadd_sat c1, c2) -> c3 define i32 @combine_constfold_i32() { ; CHECK-LABEL: combine_constfold_i32: diff --git a/llvm/test/CodeGen/X86/combine-sub-ssat.ll b/llvm/test/CodeGen/X86/combine-sub-ssat.ll index a17573d..423efd2b 100644 --- a/llvm/test/CodeGen/X86/combine-sub-ssat.ll +++ b/llvm/test/CodeGen/X86/combine-sub-ssat.ll @@ -11,13 +11,43 @@ declare i32 @llvm.ssub.sat.i32 (i32, i32) declare i64 @llvm.ssub.sat.i64 (i64, i64) declare <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16>, <8 x i16>) +; fold (ssub_sat x, undef) -> 0 +define i32 @combine_undef_i32(i32 %a0) { +; CHECK-LABEL: combine_undef_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: movl %edi, %ecx +; CHECK-NEXT: subl %eax, %ecx +; CHECK-NEXT: setns %al +; CHECK-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF +; CHECK-NEXT: subl %eax, %edi +; CHECK-NEXT: cmovnol %edi, %eax +; CHECK-NEXT: retq + %res = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 undef) + ret i32 %res +} + +define <8 x i16> @combine_undef_v8i16(<8 x i16> %a0) { +; SSE-LABEL: combine_undef_v8i16: +; SSE: # %bb.0: +; SSE-NEXT: psubsw %xmm0, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: combine_undef_v8i16: +; AVX: # %bb.0: +; AVX-NEXT: vpsubsw %xmm0, %xmm0, %xmm0 +; AVX-NEXT: retq + %res = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> undef, <8 x i16> %a0) + ret <8 x i16> %res +} + ; fold (ssub_sat c, 0) -> x define i32 @combine_zero_i32(i32 %a0) { ; CHECK-LABEL: combine_zero_i32: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: retq - %1 = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 0); + %1 = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 0) ret i32 %1 } @@ -25,6 +55,6 @@ define <8 x i16> @combine_zero_v8i16(<8 x i16> %a0) { ; CHECK-LABEL: combine_zero_v8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: retq - %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer); + %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer) ret <8 x i16> %1 } diff --git a/llvm/test/CodeGen/X86/combine-sub-usat.ll b/llvm/test/CodeGen/X86/combine-sub-usat.ll index 94d8aec..f421249 100644 --- a/llvm/test/CodeGen/X86/combine-sub-usat.ll +++ b/llvm/test/CodeGen/X86/combine-sub-usat.ll @@ -11,13 +11,39 @@ declare i32 @llvm.usub.sat.i32 (i32, i32) declare i64 @llvm.usub.sat.i64 (i64, i64) declare <8 x i16> @llvm.usub.sat.v8i16(<8 x i16>, <8 x i16>) +; fold (usub_sat x, undef) -> 0 +define i32 @combine_undef_i32(i32 %a0) { +; CHECK-LABEL: combine_undef_i32: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: subl %eax, %edi +; CHECK-NEXT: cmovael %edi, %eax +; CHECK-NEXT: retq + %res = call i32 @llvm.usub.sat.i32(i32 %a0, i32 undef) + ret i32 %res +} + +define <8 x i16> @combine_undef_v8i16(<8 x i16> %a0) { +; SSE-LABEL: combine_undef_v8i16: +; SSE: # %bb.0: +; SSE-NEXT: psubusw %xmm0, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: combine_undef_v8i16: +; AVX: # %bb.0: +; AVX-NEXT: vpsubusw %xmm0, %xmm0, %xmm0 +; AVX-NEXT: retq + %res = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> undef, <8 x i16> %a0) + ret <8 x i16> %res +} + ; fold (usub_sat c, 0) -> x define i32 @combine_zero_i32(i32 %a0) { ; CHECK-LABEL: combine_zero_i32: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: retq - %1 = call i32 @llvm.usub.sat.i32(i32 %a0, i32 0); + %1 = call i32 @llvm.usub.sat.i32(i32 %a0, i32 0) ret i32 %1 } @@ -25,6 +51,6 @@ define <8 x i16> @combine_zero_v8i16(<8 x i16> %a0) { ; CHECK-LABEL: combine_zero_v8i16: ; CHECK: # %bb.0: ; CHECK-NEXT: retq - %1 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer); + %1 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer) ret <8 x i16> %1 } -- 2.7.4