From a2a0c91b47537b16908981e206f4e42db8425eca Mon Sep 17 00:00:00 2001 From: liuhongt Date: Tue, 14 Dec 2021 09:47:08 +0800 Subject: [PATCH] Fix ICE. [PR103682] Check is_gimple_assign before gimple_assign_rhs_code. gcc/ChangeLog: PR target/103682 * tree-ssa-ccp.c (optimize_atomic_bit_test_and): Check is_gimple_assign before gimple_assign_rhs_code. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/pr103682.c: New test. --- gcc/testsuite/gcc.c-torture/compile/pr103682.c | 3 +++ gcc/tree-ssa-ccp.c | 4 ++-- 2 files changed, 5 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr103682.c diff --git a/gcc/testsuite/gcc.c-torture/compile/pr103682.c b/gcc/testsuite/gcc.c-torture/compile/pr103682.c new file mode 100644 index 0000000..5ee4b21 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr103682.c @@ -0,0 +1,3 @@ +int bug(unsigned *ready, unsigned u) { + return __atomic_fetch_and (ready, ~u, 0) & u; +} diff --git a/gcc/tree-ssa-ccp.c b/gcc/tree-ssa-ccp.c index 9e12da8..a5b1f60 100644 --- a/gcc/tree-ssa-ccp.c +++ b/gcc/tree-ssa-ccp.c @@ -3703,8 +3703,8 @@ optimize_atomic_bit_test_and (gimple_stmt_iterator *gsip, g = SSA_NAME_DEF_STMT (mask); } - rhs_code = gimple_assign_rhs_code (g); - if (rhs_code != LSHIFT_EXPR + if (!is_gimple_assign (g) + || gimple_assign_rhs_code (g) != LSHIFT_EXPR || !integer_onep (gimple_assign_rhs1 (g))) return; bit = gimple_assign_rhs2 (g); -- 2.7.4