From a2077bab40875a72c4dd3af35c59a00a00a9af2c Mon Sep 17 00:00:00 2001 From: Nick Desaulniers Date: Wed, 17 Apr 2019 18:22:48 +0000 Subject: [PATCH] [AsmPrinter] defer %c to base class for ARM, PPC, and Hexagon. NFC Summary: None of these derived classes do anything that the base class cannot. If we remove these case statements, then the base class can handle them just fine. Reviewers: peter.smith, echristo Reviewed By: echristo Subscribers: nemanjai, javed.absar, eraman, kristof.beyls, hiraditya, kbarton, jsji, llvm-commits, srhines Tags: #llvm Differential Revision: https://reviews.llvm.org/D60803 llvm-svn: 358603 --- llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 3 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 10 ++++------ llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp | 4 ---- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 2 -- llvm/test/CodeGen/ARM/inlineasm-output-template.ll | 17 +++++++++++++++++ llvm/test/CodeGen/Hexagon/inlineasm-output-template.ll | 17 +++++++++++++++++ llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll | 17 +++++++++++++++++ 7 files changed, 58 insertions(+), 12 deletions(-) create mode 100644 llvm/test/CodeGen/ARM/inlineasm-output-template.ll create mode 100644 llvm/test/CodeGen/Hexagon/inlineasm-output-template.ll create mode 100644 llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp index 67dbc5a..b18bd2c 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp @@ -425,6 +425,8 @@ static void EmitGCCInlineAsmStr(const char *AsmStr, const MachineInstr *MI, unsigned OpFlags = MI->getOperand(OpNo).getImm(); ++OpNo; // Skip over the ID number. + // FIXME: Shouldn't arch-independant output template handling go into + // PrintAsmOperand? if (Modifier[0] == 'l') { // Labels are target independent. if (MI->getOperand(OpNo).isBlockAddress()) { const BlockAddress *BA = MI->getOperand(OpNo).getBlockAddress(); @@ -606,6 +608,7 @@ bool AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, if (ExtraCode && ExtraCode[0]) { if (ExtraCode[1] != 0) return true; // Unknown modifier. + // https://gcc.gnu.org/onlinedocs/gccint/Output-Template.html const MachineOperand &MO = MI->getOperand(OpNo); switch (ExtraCode[0]) { default: diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp index 724172c..dd2b472 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp @@ -270,13 +270,11 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) << "]"; return false; + } else if (MI->getOperand(OpNum).isImm()) { + O << MI->getOperand(OpNum).getImm(); + return false; } - LLVM_FALLTHROUGH; - case 'c': // Don't print "#" before an immediate operand. - if (!MI->getOperand(OpNum).isImm()) - return true; - O << MI->getOperand(OpNum).getImm(); - return false; + return true; case 'P': // Print a VFP double precision register. case 'q': // Print a NEON quad precision register. printOperand(MI, OpNum, O); diff --git a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp index 3bf76ea..1226bed 100644 --- a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp +++ b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp @@ -124,10 +124,6 @@ bool HexagonAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, default: // See if this is a generic print operand return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS); - case 'c': // Don't print "$" before a global var name or constant. - // Hexagon never has a prefix. - printOperand(MI, OpNo, OS); - return false; case 'L': case 'H': { // The highest-numbered register of a pair. const MachineOperand &MO = MI->getOperand(OpNo); diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index 716c4a5..b35e263 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -231,8 +231,6 @@ bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, default: // See if this is a generic print operand return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); - case 'c': // Don't print "$" before a global var name or constant. - break; // PPC never has a prefix. case 'L': // Write second word of DImode reference. // Verify that this operand has two consecutive registers. if (!MI->getOperand(OpNo).isReg() || diff --git a/llvm/test/CodeGen/ARM/inlineasm-output-template.ll b/llvm/test/CodeGen/ARM/inlineasm-output-template.ll new file mode 100644 index 0000000..9acec42 --- /dev/null +++ b/llvm/test/CodeGen/ARM/inlineasm-output-template.ll @@ -0,0 +1,17 @@ +; RUN: llc -mtriple=armv7-linux-gnueabi < %s | FileCheck %s + +; Test that %c works with immediates +; CHECK-LABEL: test_inlineasm_c_output_template0 +; CHECK: @TEST 42 +define dso_local i32 @test_inlineasm_c_output_template0() { + tail call void asm sideeffect "@TEST ${0:c}", "i"(i32 42) + ret i32 42 +} + +; Test that %n works with immediates +; CHECK-LABEL: test_inlineasm_c_output_template1 +; CHECK: @TEST -42 +define dso_local i32 @test_inlineasm_c_output_template1() { + tail call void asm sideeffect "@TEST ${0:n}", "i"(i32 42) + ret i32 42 +} diff --git a/llvm/test/CodeGen/Hexagon/inlineasm-output-template.ll b/llvm/test/CodeGen/Hexagon/inlineasm-output-template.ll new file mode 100644 index 0000000..b4ca120 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/inlineasm-output-template.ll @@ -0,0 +1,17 @@ +; RUN: llc -mtriple=hexagon < %s | FileCheck %s + +; Test that %c works with immediates +; CHECK-LABEL: test_inlineasm_c_output_template0 +; CHECK: //TEST 42 +define dso_local i32 @test_inlineasm_c_output_template0() { + tail call void asm sideeffect "//TEST ${0:c}", "i"(i32 42) + ret i32 42 +} + +; Test that %n works with immediates +; CHECK-LABEL: test_inlineasm_c_output_template1 +; CHECK: //TEST -42 +define dso_local i32 @test_inlineasm_c_output_template1() { + tail call void asm sideeffect "//TEST ${0:n}", "i"(i32 42) + ret i32 42 +} diff --git a/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll b/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll new file mode 100644 index 0000000..037acf7 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll @@ -0,0 +1,17 @@ +; RUN: llc -mtriple=ppc32-- < %s | FileCheck %s + +; Test that %c works with immediates +; CHECK-LABEL: test_inlineasm_c_output_template0 +; CHECK: #TEST 42 +define dso_local i32 @test_inlineasm_c_output_template0() { + tail call void asm sideeffect "#TEST ${0:c}", "i"(i32 42) + ret i32 42 +} + +; Test that %n works with immediates +; CHECK-LABEL: test_inlineasm_c_output_template1 +; CHECK: #TEST -42 +define dso_local i32 @test_inlineasm_c_output_template1() { + tail call void asm sideeffect "#TEST ${0:n}", "i"(i32 42) + ret i32 42 +} -- 2.7.4