From a19b27b90e5eff48f500b58f04f9969ea54a2fed Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Thu, 2 Apr 2020 08:12:24 -0400 Subject: [PATCH] [PhaseOrdering] add test for vector trunc; NFC See discussion in D76983. --- llvm/test/Transforms/PhaseOrdering/vector-trunc.ll | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 llvm/test/Transforms/PhaseOrdering/vector-trunc.ll diff --git a/llvm/test/Transforms/PhaseOrdering/vector-trunc.ll b/llvm/test/Transforms/PhaseOrdering/vector-trunc.ll new file mode 100644 index 0000000..494b9a7 --- /dev/null +++ b/llvm/test/Transforms/PhaseOrdering/vector-trunc.ll @@ -0,0 +1,24 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -O2 -S -data-layout="e" < %s | FileCheck %s --check-prefixes=ANY,OLDPM +; RUN: opt -passes='default' -S -data-layout="e" < %s | FileCheck %s --check-prefixes=ANY,NEWPM + +define <4 x i16> @truncate(<4 x i32> %x) { +; ANY-LABEL: @truncate( +; ANY-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[X:%.*]] to <8 x i16> +; ANY-NEXT: [[V3:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <4 x i32> +; ANY-NEXT: ret <4 x i16> [[V3]] +; + %x0 = extractelement <4 x i32> %x, i32 0 + %t0 = trunc i32 %x0 to i16 + %v0 = insertelement <4 x i16> undef, i16 %t0, i32 0 + %x1 = extractelement <4 x i32> %x, i32 1 + %t1 = trunc i32 %x1 to i16 + %v1 = insertelement <4 x i16> %v0, i16 %t1, i32 1 + %x2 = extractelement <4 x i32> %x, i32 2 + %t2 = trunc i32 %x2 to i16 + %v2 = insertelement <4 x i16> %v1, i16 %t2, i32 2 + %x3 = extractelement <4 x i32> %x, i32 3 + %t3 = trunc i32 %x3 to i16 + %v3 = insertelement <4 x i16> %v2, i16 %t3, i32 3 + ret <4 x i16> %v3 +} -- 2.7.4