From a07402ac9cea19b3af70ed6469bb6d937132a18f Mon Sep 17 00:00:00 2001 From: dramforever Date: Thu, 9 Jun 2022 15:07:31 +0800 Subject: [PATCH] lib: sbi: Fix tval and tinst for sbi_get_insn() We should not change trap->tval to mepc because mtval already points to the faulting portion of the emulated instruction fetch, which is also what stval is expected to be. In addition, htinst is only allowed to be zero for instruction access faults or page faults, and is only allowed to be zero or a psuedoinstruction for instruction guest-page faults. Fix trap->tinst for these cases. Signed-off-by: dramforever Reviewed-by: Anup Patel --- lib/sbi/sbi_unpriv.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c index 73b530c..9a34a71 100644 --- a/lib/sbi/sbi_unpriv.c +++ b/lib/sbi/sbi_unpriv.c @@ -149,15 +149,17 @@ ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap) switch (trap->cause) { case CAUSE_LOAD_ACCESS: trap->cause = CAUSE_FETCH_ACCESS; - trap->tval = mepc; + trap->tinst = 0UL; break; case CAUSE_LOAD_PAGE_FAULT: trap->cause = CAUSE_FETCH_PAGE_FAULT; - trap->tval = mepc; + trap->tinst = 0UL; break; case CAUSE_LOAD_GUEST_PAGE_FAULT: trap->cause = CAUSE_FETCH_GUEST_PAGE_FAULT; - trap->tval = mepc; + if (trap->tinst != INSN_PSEUDO_VS_LOAD && + trap->tinst != INSN_PSEUDO_VS_STORE) + trap->tinst = 0UL; break; default: break; -- 2.7.4