From a018e28f0880c1eaa72b09d2ec64831024d149a6 Mon Sep 17 00:00:00 2001 From: Gayatri Kammela Date: Tue, 4 Feb 2020 15:01:57 -0800 Subject: [PATCH] platform/x86: intel_pmc_core: Remove slp_s0 attributes from tgl_reg_map If platforms such as Tiger Lake has sub-states of S0ix, then both slp_s0_debug_status and slp_s0_dbg_latch entries become invalid. Thus, remove slp_s0_offset and slp_s0_dbg_maps attributes from tgl_reg_map, so that both the entries are not created. Cc: Srinivas Pandruvada Cc: Andy Shevchenko Cc: David Box Suggested-by: David Box Signed-off-by: Gayatri Kammela Signed-off-by: Andy Shevchenko --- drivers/platform/x86/intel_pmc_core.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 8792b46..97511a7 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -556,8 +556,6 @@ static const struct pmc_bit_map *tgl_lpm_maps[] = { static const struct pmc_reg_map tgl_reg_map = { .pfear_sts = ext_tgl_pfear_map, - .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET, - .slps0_dbg_maps = cnp_slps0_dbg_maps, .ltr_show_sts = cnp_ltr_show_map, .msr_sts = msr_map, .slps0_dbg_offset = CNP_PMC_SLPS0_DBG_OFFSET, -- 2.7.4