From 9fa67f1c1228a852e23943a41e68b664172c654c Mon Sep 17 00:00:00 2001 From: Tobias Burnus Date: Mon, 28 Nov 2022 11:11:43 +0100 Subject: [PATCH] gcn: Fix __builtin_gcn_first_call_this_thread_p Contrary naive expectation, unspec_volatile (via prologue_use) did not prevent the cprop pass (at -O2) to remove the access to the s[0:1] (PRIVATE_SEGMENT_BUFFER_ARG) register as the volatile got just put on the preceeding pseudoregister. Solution: Use gen_rtx_USE instead. Additionally, this patch removes (gen_)prologue_use_di as it is then no longer used. Finally, as we already do bit manipulation, instead of using the full 64bit side - and then just keeping the value of 's0', just move directly to use only s1 of s[0:1] and do the bit manipulations there, generating more readable assembly code and better matching the '#else' branch. gcc/ChangeLog: * config/gcn/gcn.cc (gcn_expand_builtin_1): Work on s1 instead of s[0:1] and use USE to prevent removal of setting that register. * config/gcn/gcn.md (prologue_use_di): Remove. --- gcc/config/gcn/gcn.cc | 16 ++++++++-------- gcc/config/gcn/gcn.md | 13 ------------- 2 files changed, 8 insertions(+), 21 deletions(-) diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc index 6fb2613..c74fa00 100644 --- a/gcc/config/gcn/gcn.cc +++ b/gcc/config/gcn/gcn.cc @@ -4556,8 +4556,9 @@ gcn_expand_builtin_1 (tree exp, rtx target, rtx /*subtarget */ , rtx not_first = gen_label_rtx (); rtx reg = gen_rtx_REG (DImode, cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG]); - rtx cmp = force_reg (DImode, - gen_rtx_LSHIFTRT (DImode, reg, GEN_INT (48))); + reg = gcn_operand_part (DImode, reg, 1); + rtx cmp = force_reg (SImode, + gen_rtx_LSHIFTRT (SImode, reg, GEN_INT (16))); emit_insn (gen_cstoresi4 (result, gen_rtx_NE (BImode, cmp, GEN_INT(12345)), cmp, GEN_INT(12345))); @@ -4565,12 +4566,11 @@ gcn_expand_builtin_1 (tree exp, rtx target, rtx /*subtarget */ , const0_rtx), result)); emit_move_insn (reg, - force_reg (DImode, - gen_rtx_IOR (DImode, - gen_rtx_AND (DImode, reg, - GEN_INT (0x0000ffffffffffffL)), - GEN_INT (12345L << 48)))); - emit_insn (gen_prologue_use (reg)); + force_reg (SImode, + gen_rtx_IOR (SImode, + gen_rtx_AND (SImode, reg, GEN_INT (0x0000ffff)), + GEN_INT (12345L << 16)))); + emit_insn (gen_rtx_USE (VOIDmode, reg)); emit_label (not_first); } return result; diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md index a8b9c28..92e9892 100644 --- a/gcc/config/gcn/gcn.md +++ b/gcc/config/gcn/gcn.md @@ -697,19 +697,6 @@ "" [(set_attr "length" "0")]) -(define_insn_and_split "prologue_use_di" - [(unspec_volatile [(match_operand:DI 0 "register_operand")] UNSPECV_PROLOGUE_USE)] - "" - "#" - "reload_completed" - [(unspec_volatile [(match_dup 0)] UNSPECV_PROLOGUE_USE) - (unspec_volatile [(match_dup 1)] UNSPECV_PROLOGUE_USE)] - { - operands[1] = gcn_operand_part (DImode, operands[0], 1); - operands[0] = gcn_operand_part (DImode, operands[0], 0); - } - [(set_attr "length" "0")]) - (define_expand "prologue" [(const_int 0)] "" -- 2.7.4