From 9f6f411f63f3aceddd846e4b0d27202a6e13d42c Mon Sep 17 00:00:00 2001 From: Tamar Christina Date: Wed, 2 Feb 2022 10:52:17 +0000 Subject: [PATCH] AArch32: use canonical ordering for complex mul, fma and fms After the first patch in the series this updates the optabs to expect the canonical sequence. gcc/ChangeLog: PR tree-optimization/102819 PR tree-optimization/103169 * config/arm/vec-common.md (cml4): Use canonical order. --- gcc/config/arm/vec-common.md | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index cef358e..2718d82 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -265,18 +265,18 @@ ;; remainder. Because of this, expand early. (define_expand "cml4" [(set (match_operand:VF 0 "register_operand") - (plus:VF (match_operand:VF 1 "register_operand") - (unspec:VF [(match_operand:VF 2 "register_operand") - (match_operand:VF 3 "register_operand")] - VCMLA_OP)))] + (plus:VF (unspec:VF [(match_operand:VF 1 "register_operand") + (match_operand:VF 2 "register_operand")] + VCMLA_OP) + (match_operand:VF 3 "register_operand")))] "(TARGET_COMPLEX || (TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT && ARM_HAVE__ARITH)) && !BYTES_BIG_ENDIAN" { rtx tmp = gen_reg_rtx (mode); - emit_insn (gen_arm_vcmla (tmp, operands[1], - operands[3], operands[2])); + emit_insn (gen_arm_vcmla (tmp, operands[3], + operands[2], operands[1])); emit_insn (gen_arm_vcmla (operands[0], tmp, - operands[3], operands[2])); + operands[2], operands[1])); DONE; }) -- 2.7.4