From 9f69c1bc54f415e4746732bdee75f4cc155c4762 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Wed, 18 Nov 2020 14:03:43 +0000 Subject: [PATCH] [AMDGPU] Rename pseudo S_WAITCNT_IDLE to S_WAIT_IDLE. NFC. --- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 2 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp index fc3d385a..d639495 100644 --- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp +++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp @@ -1184,7 +1184,7 @@ int GCNHazardRecognizer::checkFPAtomicToDenormModeHazard(MachineInstr *MI) { case AMDGPU::S_WAITCNT_VMCNT: case AMDGPU::S_WAITCNT_EXPCNT: case AMDGPU::S_WAITCNT_LGKMCNT: - case AMDGPU::S_WAITCNT_IDLE: + case AMDGPU::S_WAIT_IDLE: return true; default: break; diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td index 0052717..7426af9 100644 --- a/llvm/lib/Target/AMDGPU/SOPInstructions.td +++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td @@ -1300,7 +1300,7 @@ let SubtargetPredicate = isGFX10Plus in { SOPP_Pseudo<"s_inst_prefetch", (ins s16imm:$simm16), "$simm16">; def S_CLAUSE : SOPP_Pseudo<"s_clause", (ins s16imm:$simm16), "$simm16">; - def S_WAITCNT_IDLE : + def S_WAIT_IDLE : SOPP_Pseudo <"s_wait_idle", (ins), ""> { let simm16 = 0; let fixed_imm = 1; @@ -1759,7 +1759,7 @@ defm S_ENDPGM_ORDERED_PS_DONE : SOPP_Real_32_gfx8_gfx9_gfx10<0x01e>; defm S_CODE_END : SOPP_Real_32_gfx10<0x01f>; defm S_INST_PREFETCH : SOPP_Real_32_gfx10<0x020>; defm S_CLAUSE : SOPP_Real_32_gfx10<0x021>; -defm S_WAITCNT_IDLE : SOPP_Real_32_gfx10<0x022>; +defm S_WAIT_IDLE : SOPP_Real_32_gfx10<0x022>; defm S_WAITCNT_DEPCTR : SOPP_Real_32_gfx10<0x023>; defm S_ROUND_MODE : SOPP_Real_32_gfx10<0x024>; defm S_DENORM_MODE : SOPP_Real_32_gfx10<0x025>; -- 2.7.4