From 9f37ccb1946e0333e03cf6bcecad46e410a7158b Mon Sep 17 00:00:00 2001 From: Ulrich Weigand Date: Mon, 14 Jan 2002 16:56:24 +0000 Subject: [PATCH] s390.md (movstrdix_64, [...]): Improve RTL templates. * config/s390/s390.md (movstrdix_64, movstrsix_31, movstrdi_64, movstrsi_31, clrstrsi_64, clrstrsi_31): Improve RTL templates. (clrstrdi, clrstrsi): Adapt callers. (extendsidi2, zero_extendsidi2): Remove no-conflict blocks. (movti splitter): Never use register 0 as base register. From-SVN: r48832 --- gcc/ChangeLog | 10 ++++ gcc/config/s390/s390.md | 127 +++++++++++++++++++++++------------------------- 2 files changed, 72 insertions(+), 65 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b65778b..d199ca6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2002-01-14 Ulrich Weigand + + * config/s390/s390.md (movstrdix_64, movstrsix_31, movstrdi_64, + movstrsi_31, clrstrsi_64, clrstrsi_31): Improve RTL templates. + (clrstrdi, clrstrsi): Adapt callers. + + (extendsidi2, zero_extendsidi2): Remove no-conflict blocks. + + (movti splitter): Never use register 0 as base register. + 2002-01-14 Hartmut Penner * combine.c (simplify_shift_const): Always generate new rtx diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 68fe9e7..8a8b2ee 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -866,7 +866,7 @@ && !s_operand (operands[1], VOIDmode)" [(set (match_dup 2) (match_dup 3)) (set (match_dup 0) (mem:TI (match_dup 2)))] - "operands[2] = operand_subword (operands[0], 0, 0, TImode); + "operands[2] = operand_subword (operands[0], 1, 0, TImode); operands[3] = XEXP (operands[1], 0);") ; @@ -1717,11 +1717,15 @@ ; Move a block that is more than 256 bytes in lenght or length in register (define_insn "movstrdix_64" - [(clobber (match_operand:DI 0 "register_operand" "=a")) - (clobber (match_operand:DI 1 "register_operand" "=a")) - (set (mem:BLK (match_operand:DI 2 "register_operand" "0")) - (mem:BLK (match_operand:DI 3 "register_operand" "1"))) - (use (match_operand:DI 4 "register_operand" "a")) + [(use (match_operand:DI 4 "register_operand" "a")) + (set (match_operand:DI 0 "register_operand" "=a") + (plus:DI (match_operand:DI 2 "register_operand" "0") + (and:DI (match_dup 4) (const_int -256)))) + (set (match_operand:DI 1 "register_operand" "=a") + (plus:DI (match_operand:DI 3 "register_operand" "1") + (and:DI (match_dup 4) (const_int -256)))) + (set (mem:BLK (match_dup 2)) + (mem:BLK (match_dup 3))) (clobber (match_scratch:DI 5 "=&a")) (clobber (reg:CC 33))] "" @@ -1753,11 +1757,15 @@ (set_attr "length" "44")]) (define_insn "movstrsix_31" - [(clobber (match_operand:SI 0 "register_operand" "=a")) - (clobber (match_operand:SI 1 "register_operand" "=a")) - (set (mem:BLK (match_operand:SI 2 "register_operand" "0")) - (mem:BLK (match_operand:SI 3 "register_operand" "1"))) - (use (match_operand:SI 4 "register_operand" "a")) + [(use (match_operand:SI 4 "register_operand" "a")) + (set (match_operand:SI 0 "register_operand" "=a") + (plus:SI (match_operand:SI 2 "register_operand" "0") + (and:SI (match_dup 4) (const_int -256)))) + (set (match_operand:SI 1 "register_operand" "=a") + (plus:SI (match_operand:SI 3 "register_operand" "1") + (and:SI (match_dup 4) (const_int -256)))) + (set (mem:BLK (match_dup 2)) + (mem:BLK (match_dup 3))) (clobber (match_scratch:SI 5 "=&a")) (clobber (reg:CC 33))] "" @@ -1792,24 +1800,36 @@ ; Move a block that is larger than 255 bytes in length. (define_insn "movstrdi_64" - [(clobber (match_operand:TI 0 "register_operand" "=d")) - (clobber (match_operand:TI 1 "register_operand" "=d")) - (set (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0)) - (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0))) + [(set (match_operand:TI 0 "register_operand" "=d") + (ashift:TI (plus:TI (match_operand:TI 2 "register_operand" "0") + (lshiftrt:TI (match_dup 2) (const_int 64))) + (const_int 64))) + (set (match_operand:TI 1 "register_operand" "=d") + (ashift:TI (plus:TI (match_operand:TI 3 "register_operand" "1") + (lshiftrt:TI (match_dup 3) (const_int 64))) + (const_int 64))) + (set (mem:BLK (subreg:DI (match_dup 2) 0)) + (mem:BLK (subreg:DI (match_dup 3) 0))) (clobber (reg:CC 33))] - "" + "TARGET_64BIT" "mvcle\\t%0,%1,0\;jo\\t.-4" [(set_attr "op_type" "NN") (set_attr "atype" "mem") (set_attr "length" "8")]) (define_insn "movstrsi_31" - [(clobber (match_operand:DI 0 "register_operand" "=d")) - (clobber (match_operand:DI 1 "register_operand" "=d")) - (set (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0)) - (mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "1") 0))) + [(set (match_operand:DI 0 "register_operand" "=d") + (ashift:DI (plus:DI (match_operand:DI 2 "register_operand" "0") + (lshiftrt:DI (match_dup 2) (const_int 32))) + (const_int 32))) + (set (match_operand:DI 1 "register_operand" "=d") + (ashift:DI (plus:DI (match_operand:DI 3 "register_operand" "1") + (lshiftrt:DI (match_dup 3) (const_int 32))) + (const_int 32))) + (set (mem:BLK (subreg:SI (match_dup 2) 0)) + (mem:BLK (subreg:SI (match_dup 3) 0))) (clobber (reg:CC 33))] - "" + "!TARGET_64BIT" "mvcle\\t%0,%1,0\;jo\\t.-4" [(set_attr "op_type" "NN") (set_attr "atype" "mem") @@ -1853,7 +1873,7 @@ emit_move_insn (gen_lowpart (DImode, reg1), const0_rtx); /* Clear! */ - emit_insn (gen_clrstrsi_64 (reg0, reg1, reg0, reg1)); + emit_insn (gen_clrstrsi_64 (reg0, reg1, reg0)); DONE; } }") @@ -1896,7 +1916,7 @@ emit_move_insn (gen_lowpart (SImode, reg1), const0_rtx); /* CLear! */ - emit_insn (gen_clrstrsi_31 (reg0, reg1, reg0, reg1)); + emit_insn (gen_clrstrsi_31 (reg0, reg1, reg0)); DONE; } }") @@ -1917,11 +1937,13 @@ ; Clear memory with length greater 256 bytes or lenght not constant (define_insn "clrstrsi_64" - [(clobber (match_operand:TI 0 "register_operand" "=d")) - (clobber (match_operand:TI 1 "register_operand" "=d")) - (set (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0)) + [(set (match_operand:TI 0 "register_operand" "=d") + (ashift:TI (plus:TI (match_operand:TI 2 "register_operand" "0") + (lshiftrt:TI (match_dup 2) (const_int 64))) + (const_int 64))) + (set (mem:BLK (subreg:DI (match_dup 2) 0)) (const_int 0)) - (use (match_operand:TI 3 "register_operand" "1")) + (use (match_operand:TI 1 "register_operand" "d")) (clobber (reg:CC 33))] "TARGET_64BIT" "mvcle\\t%0,%1,0\;jo\\t.-4" @@ -1931,11 +1953,13 @@ (set_attr "length" "8")]) (define_insn "clrstrsi_31" - [(clobber (match_operand:DI 0 "register_operand" "=d")) - (clobber (match_operand:DI 1 "register_operand" "=d")) - (set (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0)) + [(set (match_operand:DI 0 "register_operand" "=d") + (ashift:DI (plus:DI (match_operand:DI 2 "register_operand" "0") + (lshiftrt:DI (match_dup 2) (const_int 32))) + (const_int 32))) + (set (mem:BLK (subreg:SI (match_dup 2) 0)) (const_int 0)) - (use (match_operand:DI 3 "register_operand" "1")) + (use (match_operand:DI 1 "register_operand" "d")) (clobber (reg:CC 33))] "!TARGET_64BIT" "mvcle\\t%0,%1,0\;jo\\t.-4" @@ -2242,23 +2266,10 @@ { if (!TARGET_64BIT) { - rtx insns, subword; - - operands[1] = force_reg (SImode, operands[1]); - subword = operand_subword (operands[0], 0, 1, DImode); - - start_sequence (); - emit_move_insn (subword, operands[1]); - emit_insn (gen_ashrdi3 (operands[0], operands[0], GEN_INT (32))); - insns = get_insns (); - end_sequence (); - - emit_no_conflict_block (insns, operands[0], operands[1], 0, - gen_rtx_SIGN_EXTEND (DImode, operands[1])); - - /* Avoid having the REG_RETVAL destroyed by someone attaching - other REG_EQUAL notes. */ - emit_move_insn (operands[0], operands[0]); + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); + emit_move_insn (gen_highpart (SImode, operands[0]), operands[1]); + emit_move_insn (gen_lowpart (SImode, operands[0]), const0_rtx); + emit_insn (gen_ashrdi3 (operands[0], operands[0], GEN_INT (32))); DONE; } } @@ -2419,23 +2430,9 @@ { if (!TARGET_64BIT) { - rtx insns, subword; - - operands[1] = force_reg (SImode, operands[1]); - subword = operand_subword (operands[0], 0, 1, DImode); - - start_sequence (); - emit_move_insn (subword, operands[1]); - emit_insn (gen_lshrdi3 (operands[0], operands[0], GEN_INT (32))); - insns = get_insns (); - end_sequence (); - - emit_no_conflict_block (insns, operands[0], operands[1], 0, - gen_rtx_ZERO_EXTEND (DImode, operands[1])); - - /* Avoid having the REG_RETVAL destroyed by someone attaching - other REG_EQUAL notes. */ - emit_move_insn (operands[0], operands[0]); + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); + emit_move_insn (gen_lowpart (SImode, operands[0]), operands[1]); + emit_move_insn (gen_highpart (SImode, operands[0]), const0_rtx); DONE; } } -- 2.7.4