From 9e6309caca998f3f6405b7f878b642db57d58e3f Mon Sep 17 00:00:00 2001 From: "ke.zhu" Date: Fri, 3 Dec 2021 10:54:10 +0800 Subject: [PATCH] =?utf8?q?PLIC=20cannot=20EOI=20masked=20interrupts?= =?utf8?q?=EF=BC=8Cso=20Re-enable=20the=20interrupt=20before=20completion?= =?utf8?q?=20if=20it=20has=20been=20masked=20during=20the=20handling=20and?= =?utf8?q?=20remask=20it=20afterwards.?= MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit --- drivers/irqchip/irq-sifive-plic.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) mode change 100644 => 100755 drivers/irqchip/irq-sifive-plic.c diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c old mode 100644 new mode 100755 index cf74cfa..259065d --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -163,7 +163,13 @@ static void plic_irq_eoi(struct irq_data *d) { struct plic_handler *handler = this_cpu_ptr(&plic_handlers); - writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM); + if (irqd_irq_masked(d)) { + plic_irq_unmask(d); + writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM); + plic_irq_mask(d); + } else { + writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM); + } } static struct irq_chip plic_chip = { -- 2.7.4