From 9de3d4f0493871f054a163917cf7695d66cb23ad Mon Sep 17 00:00:00 2001 From: Kewen Lin Date: Fri, 1 Nov 2019 11:52:15 +0000 Subject: [PATCH] [rs6000] Replace vsx_xvcdpsp by vsx_xvcvdpsp 2019-11-01 Kewen Lin * config/rs6000/vsx.md (vsx_xvcdpsp): Remove define_insn. (UNSPEC_VSX_XVCDPSP): Remove. * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Replace gen_vsx_xvcdpsp by gen_vsx_xvcvdpsp. From-SVN: r277706 --- gcc/ChangeLog | 7 +++++++ gcc/config/rs6000/rs6000.c | 4 ++-- gcc/config/rs6000/vsx.md | 9 --------- 3 files changed, 9 insertions(+), 11 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 08d3ba0..7b1645e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-11-01 Kewen Lin + + * config/rs6000/vsx.md (vsx_xvcdpsp): Remove define_insn. + (UNSPEC_VSX_XVCDPSP): Remove. + * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): + Replace gen_vsx_xvcdpsp by gen_vsx_xvcvdpsp. + 2019-11-01 Tobias Burnus * hooks.c (hook_tree_tree_bool_null): New. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 9ed5151..d9d275b 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -26079,8 +26079,8 @@ rs6000_generate_float2_double_code (rtx dst, rtx src1, rtx src2) rtx_tmp2 = gen_reg_rtx (V4SFmode); rtx_tmp3 = gen_reg_rtx (V4SFmode); - emit_insn (gen_vsx_xvcdpsp (rtx_tmp2, rtx_tmp0)); - emit_insn (gen_vsx_xvcdpsp (rtx_tmp3, rtx_tmp1)); + emit_insn (gen_vsx_xvcvdpsp (rtx_tmp2, rtx_tmp0)); + emit_insn (gen_vsx_xvcvdpsp (rtx_tmp3, rtx_tmp1)); if (BYTES_BIG_ENDIAN) emit_insn (gen_p8_vmrgew_v4sf (dst, rtx_tmp2, rtx_tmp3)); diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index a0b2e7b..7b29c7f 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -301,7 +301,6 @@ UNSPEC_VSX_XVCVSXDDP UNSPEC_VSX_XVCVUXDDP UNSPEC_VSX_XVCVDPSXDS - UNSPEC_VSX_XVCDPSP UNSPEC_VSX_XVCVDPUXDS UNSPEC_VSX_SIGN_EXTEND UNSPEC_VSX_XVCVSPSXWS @@ -2375,14 +2374,6 @@ "xvcvuxdsp %x0,%x1" [(set_attr "type" "vecdouble")]) -(define_insn "vsx_xvcdpsp" - [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa") - (unspec:V4SF [(match_operand:V2DF 1 "vsx_register_operand" "wa")] - UNSPEC_VSX_XVCDPSP))] - "VECTOR_UNIT_VSX_P (V2DFmode)" - "xvcvdpsp %x0,%x1" - [(set_attr "type" "vecdouble")]) - ;; Convert from 32-bit to 64-bit types ;; Provide both vector and scalar targets (define_insn "vsx_xvcvsxwdp" -- 2.7.4