From 9d7b4c207b50a0db1f25b6fd8fb68c779497d62f Mon Sep 17 00:00:00 2001 From: Tomas Matheson Date: Sat, 26 Nov 2022 13:44:36 +0000 Subject: [PATCH] [AArch64] Remove unused fields from CPUs in TargetParser Differential Revision: https://reviews.llvm.org/D138754 --- llvm/include/llvm/Support/AArch64TargetParser.def | 124 +++++++++++----------- llvm/include/llvm/Support/AArch64TargetParser.h | 5 +- llvm/lib/Support/AArch64TargetParser.cpp | 9 +- 3 files changed, 68 insertions(+), 70 deletions(-) diff --git a/llvm/include/llvm/Support/AArch64TargetParser.def b/llvm/include/llvm/Support/AArch64TargetParser.def index d522bbf..e09450d 100644 --- a/llvm/include/llvm/Support/AArch64TargetParser.def +++ b/llvm/include/llvm/Support/AArch64TargetParser.def @@ -159,178 +159,178 @@ AARCH64_ARCH_EXT_NAME("lse128", AArch64::AEK_LSE128, "+lse128", #undef AARCH64_ARCH_EXT_NAME #ifndef AARCH64_CPU_NAME -#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) +#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT) #endif -AARCH64_CPU_NAME("cortex-a34", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a34", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("cortex-a35", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a35", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("cortex-a53", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true, +AARCH64_CPU_NAME("cortex-a53", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("cortex-a55", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a55", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC)) -AARCH64_CPU_NAME("cortex-a510", ARMV9A, FK_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a510", ARMV9A, (AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SB | AArch64::AEK_PAUTH | AArch64::AEK_MTE | AArch64::AEK_SSBS | AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM | AArch64::AEK_FP16FML)) -AARCH64_CPU_NAME("cortex-a57", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a57", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("cortex-a65", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a65", ARMV8_2A, (AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_SSBS)) -AARCH64_CPU_NAME("cortex-a65ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a65ae", ARMV8_2A, (AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_SSBS)) -AARCH64_CPU_NAME("cortex-a72", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a72", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("cortex-a73", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a73", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("cortex-a75", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a75", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC)) -AARCH64_CPU_NAME("cortex-a76", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a76", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS)) -AARCH64_CPU_NAME("cortex-a76ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a76ae", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS)) -AARCH64_CPU_NAME("cortex-a77", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a77", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD | AArch64::AEK_SSBS)) -AARCH64_CPU_NAME("cortex-a78", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a78", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS | AArch64::AEK_PROFILE)) -AARCH64_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a78c", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS | AArch64::AEK_PROFILE | AArch64::AEK_FLAGM | AArch64::AEK_PAUTH | AArch64::AEK_FP16FML)) -AARCH64_CPU_NAME("cortex-a710", ARMV9A, FK_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a710", ARMV9A, (AArch64::AEK_MTE | AArch64::AEK_PAUTH | AArch64::AEK_FLAGM | AArch64::AEK_SB | AArch64::AEK_I8MM | AArch64::AEK_FP16FML | AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM | AArch64::AEK_BF16)) -AARCH64_CPU_NAME("cortex-a715", ARMV9A, FK_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-a715", ARMV9A, (AArch64::AEK_SB | AArch64::AEK_SSBS | AArch64::AEK_MTE | AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_PAUTH | AArch64::AEK_I8MM | AArch64::AEK_PREDRES | AArch64::AEK_PERFMON | AArch64::AEK_PROFILE | AArch64::AEK_SVE | AArch64::AEK_SVE2BITPERM | AArch64::AEK_BF16 | AArch64::AEK_FLAGM)) -AARCH64_CPU_NAME("cortex-r82", ARMV8R, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-r82", ARMV8R, (AArch64::AEK_LSE)) -AARCH64_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-x1", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS | AArch64::AEK_PROFILE)) -AARCH64_CPU_NAME("cortex-x1c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-x1c", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC | AArch64::AEK_SSBS | AArch64::AEK_PAUTH | AArch64::AEK_PROFILE)) -AARCH64_CPU_NAME("cortex-x2", ARMV9A, FK_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-x2", ARMV9A, (AArch64::AEK_MTE | AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_PAUTH | AArch64::AEK_SSBS | AArch64::AEK_SB | AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM | AArch64::AEK_FP16FML)) -AARCH64_CPU_NAME("cortex-x3", ARMV9A, FK_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cortex-x3", ARMV9A, (AArch64::AEK_SVE | AArch64::AEK_PERFMON | AArch64::AEK_PROFILE | AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_MTE | AArch64::AEK_SVE2BITPERM | AArch64::AEK_SB | AArch64::AEK_PAUTH | AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_PREDRES | AArch64::AEK_FLAGM | AArch64::AEK_SSBS)) -AARCH64_CPU_NAME("neoverse-e1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("neoverse-e1", ARMV8_2A, (AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_SSBS)) -AARCH64_CPU_NAME("neoverse-n1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("neoverse-n1", ARMV8_2A, (AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_PROFILE | AArch64::AEK_RCPC | AArch64::AEK_SSBS)) -AARCH64_CPU_NAME("neoverse-n2", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("neoverse-n2", ARMV8_5A, (AArch64::AEK_BF16 | AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_I8MM | AArch64::AEK_MTE | AArch64::AEK_SB | AArch64::AEK_SSBS | AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM)) -AARCH64_CPU_NAME("neoverse-512tvb", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("neoverse-512tvb", ARMV8_4A, (AArch64::AEK_SVE | AArch64::AEK_SSBS | AArch64::AEK_FP16 | AArch64::AEK_BF16 | AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE | AArch64::AEK_RAND | AArch64::AEK_FP16FML | AArch64::AEK_I8MM)) -AARCH64_CPU_NAME("neoverse-v1", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("neoverse-v1", ARMV8_4A, (AArch64::AEK_SVE | AArch64::AEK_SSBS | AArch64::AEK_FP16 | AArch64::AEK_BF16 | AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE | AArch64::AEK_RAND | AArch64::AEK_FP16FML | AArch64::AEK_I8MM)) -AARCH64_CPU_NAME("neoverse-v2", ARMV9A, FK_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("neoverse-v2", ARMV9A, (AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SSBS | AArch64::AEK_FP16 | AArch64::AEK_BF16 | AArch64::AEK_RAND | AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE | AArch64::AEK_SVE2BITPERM | AArch64::AEK_FP16FML | AArch64::AEK_I8MM | AArch64::AEK_MTE)) -AARCH64_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("cyclone", ARMV8A, (AArch64::AEK_NONE)) -AARCH64_CPU_NAME("apple-a7", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a7", ARMV8A, (AArch64::AEK_NONE)) -AARCH64_CPU_NAME("apple-a8", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a8", ARMV8A, (AArch64::AEK_NONE)) -AARCH64_CPU_NAME("apple-a9", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a9", ARMV8A, (AArch64::AEK_NONE)) -AARCH64_CPU_NAME("apple-a10", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a10", ARMV8A, (AArch64::AEK_CRC | AArch64::AEK_RDM)) -AARCH64_CPU_NAME("apple-a11", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a11", ARMV8_2A, (AArch64::AEK_FP16)) -AARCH64_CPU_NAME("apple-a12", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a12", ARMV8_3A, (AArch64::AEK_FP16)) -AARCH64_CPU_NAME("apple-a13", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a13", ARMV8_4A, (AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3)) -AARCH64_CPU_NAME("apple-a14", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a14", ARMV8_5A, (AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3)) -AARCH64_CPU_NAME("apple-a15", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a15", ARMV8_5A, (AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3 | AArch64::AEK_BF16 | AArch64::AEK_I8MM)) -AARCH64_CPU_NAME("apple-a16", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-a16", ARMV8_5A, (AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3 | AArch64::AEK_BF16 | AArch64::AEK_I8MM)) -AARCH64_CPU_NAME("apple-m1", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-m1", ARMV8_5A, (AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3)) -AARCH64_CPU_NAME("apple-m2", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-m2", ARMV8_5A, (AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3 | AArch64::AEK_BF16 | AArch64::AEK_I8MM)) -AARCH64_CPU_NAME("apple-s4", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-s4", ARMV8_3A, (AArch64::AEK_FP16)) -AARCH64_CPU_NAME("apple-s5", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("apple-s5", ARMV8_3A, (AArch64::AEK_FP16)) -AARCH64_CPU_NAME("exynos-m3", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("exynos-m3", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("exynos-m4", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("exynos-m4", ARMV8_2A, (AArch64::AEK_DOTPROD | AArch64::AEK_FP16)) -AARCH64_CPU_NAME("exynos-m5", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("exynos-m5", ARMV8_2A, (AArch64::AEK_DOTPROD | AArch64::AEK_FP16)) -AARCH64_CPU_NAME("falkor", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("falkor", ARMV8A, (AArch64::AEK_CRC | AArch64::AEK_RDM)) -AARCH64_CPU_NAME("saphira", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("saphira", ARMV8_3A, (AArch64::AEK_PROFILE)) -AARCH64_CPU_NAME("kryo", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("kryo", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("thunderx2t99", ARMV8_1A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("thunderx2t99", ARMV8_1A, (AArch64::AEK_NONE)) -AARCH64_CPU_NAME("thunderx3t110", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("thunderx3t110", ARMV8_3A, (AArch64::AEK_NONE)) -AARCH64_CPU_NAME("thunderx", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("thunderx", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("thunderxt88", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("thunderxt88", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("thunderxt81", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("thunderxt81", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("thunderxt83", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("thunderxt83", ARMV8A, (AArch64::AEK_CRC)) -AARCH64_CPU_NAME("tsv110", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("tsv110", ARMV8_2A, (AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_PROFILE)) -AARCH64_CPU_NAME("a64fx", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("a64fx", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_SVE)) -AARCH64_CPU_NAME("carmel", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("carmel", ARMV8_2A, AArch64::AEK_FP16) -AARCH64_CPU_NAME("ampere1", ARMV8_6A, FK_CRYPTO_NEON_FP_ARMV8, false, +AARCH64_CPU_NAME("ampere1", ARMV8_6A, (AArch64::AEK_FP16 | AArch64::AEK_SB | AArch64::AEK_SSBS)) // Invalid CPU -AARCH64_CPU_NAME("invalid", INVALID, FK_INVALID, true, AArch64::AEK_INVALID) +AARCH64_CPU_NAME("invalid", INVALID, AArch64::AEK_INVALID) #undef AARCH64_CPU_NAME #ifndef AARCH64_CPU_ALIAS diff --git a/llvm/include/llvm/Support/AArch64TargetParser.h b/llvm/include/llvm/Support/AArch64TargetParser.h index e937b56..ccee51f 100644 --- a/llvm/include/llvm/Support/AArch64TargetParser.h +++ b/llvm/include/llvm/Support/AArch64TargetParser.h @@ -125,13 +125,12 @@ const ExtName AArch64ARCHExtNames[] = { struct CpuNames { StringRef Name; ArchKind ArchID; - bool Default; // is $Name the default CPU for $ArchID ? uint64_t DefaultExtensions; }; const CpuNames AArch64CPUNames[] = { -#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ - {NAME, AArch64::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT}, +#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT) \ + {NAME, AArch64::ArchKind::ID, DEFAULT_EXT}, #include "AArch64TargetParser.def" }; diff --git a/llvm/lib/Support/AArch64TargetParser.cpp b/llvm/lib/Support/AArch64TargetParser.cpp index db098d4..e13b061 100644 --- a/llvm/lib/Support/AArch64TargetParser.cpp +++ b/llvm/lib/Support/AArch64TargetParser.cpp @@ -30,12 +30,12 @@ uint64_t AArch64::getDefaultExtensions(StringRef CPU, AArch64::ArchKind AK) { return AArch64ARCHNames[static_cast(AK)].ArchBaseExtensions; return StringSwitch(CPU) -#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ +#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT) \ .Case(NAME, AArch64ARCHNames[static_cast(ArchKind::ID)] \ .ArchBaseExtensions | \ DEFAULT_EXT) #include "../../include/llvm/Support/AArch64TargetParser.def" - .Default(AArch64::AEK_INVALID); + .Default(AArch64::AEK_INVALID); } AArch64::ArchKind AArch64::getCPUArchKind(StringRef CPU) { @@ -43,10 +43,9 @@ AArch64::ArchKind AArch64::getCPUArchKind(StringRef CPU) { return ArchKind::ARMV8A; return StringSwitch(CPU) -#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ - .Case(NAME, ArchKind::ID) +#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT) .Case(NAME, ArchKind::ID) #include "../../include/llvm/Support/AArch64TargetParser.def" - .Default(ArchKind::INVALID); + .Default(ArchKind::INVALID); } AArch64::ArchKind AArch64::getSubArchArchKind(StringRef SubArch) { -- 2.7.4