From 9d7ac684a9b1ca0bac19f429417736c4d3635129 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Fri, 19 Aug 2016 16:44:32 +0000 Subject: [PATCH] MachineScheduler: Make some GenericScheduler member variables protected Summary: We will need these in AMDGPU's new SchedStrategy implmentation. Reviewers: MatzeB, atrick Subscribers: llvm-commits, MatzeB Differential Revision: https://reviews.llvm.org/D23679 llvm-svn: 279270 --- llvm/include/llvm/CodeGen/MachineScheduler.h | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/llvm/include/llvm/CodeGen/MachineScheduler.h b/llvm/include/llvm/CodeGen/MachineScheduler.h index 01f4b21..ecced57 100644 --- a/llvm/include/llvm/CodeGen/MachineScheduler.h +++ b/llvm/include/llvm/CodeGen/MachineScheduler.h @@ -874,18 +874,6 @@ protected: /// GenericScheduler shrinks the unscheduled zone using heuristics to balance /// the schedule. class GenericScheduler : public GenericSchedulerBase { - ScheduleDAGMILive *DAG; - - // State of the top and bottom scheduled instruction boundaries. - SchedBoundary Top; - SchedBoundary Bot; - - /// Candidate last picked from Top boundary. - SchedCandidate TopCand; - /// Candidate last picked from Bot boundary. - SchedCandidate BotCand; - - MachineSchedPolicy RegionPolicy; public: GenericScheduler(const MachineSchedContext *C): GenericSchedulerBase(C), DAG(nullptr), Top(SchedBoundary::TopQID, "TopQ"), @@ -924,6 +912,20 @@ public: void registerRoots() override; protected: + ScheduleDAGMILive *DAG; + + MachineSchedPolicy RegionPolicy; + + // State of the top and bottom scheduled instruction boundaries. + SchedBoundary Top; + SchedBoundary Bot; + + /// Candidate last picked from Top boundary. + SchedCandidate TopCand; + /// Candidate last picked from Bot boundary. + SchedCandidate BotCand; + + void checkAcyclicLatency(); void initCandidate(SchedCandidate &Cand, SUnit *SU, bool AtTop, -- 2.7.4