From 9cf99a1f2050b992c645bec85ad8053270e6fff5 Mon Sep 17 00:00:00 2001 From: =?utf8?q?=EC=9D=B4=ED=95=9C=EC=A2=85/=EB=8F=99=EC=9E=91=EC=A0=9C?= =?utf8?q?=EC=96=B4Lab=28SR=29/Engineer/=EC=82=BC=EC=84=B1=EC=A0=84?= =?utf8?q?=EC=9E=90?= Date: Thu, 8 Nov 2018 17:16:57 +0900 Subject: [PATCH] [neurun] Remove IInitializerGenerator (#3525) Remove IInitializerGenerator and its implementations. We do not need this backend API anymore. Signed-off-by: Hanjoung Lee --- .../src/backend/acl_cl/InitializerGenerator.cc | 163 --------------- .../src/backend/acl_cl/InitializerGenerator.h | 55 ----- .../neurun/src/backend/cpu/InitializerGenerator.cc | 227 --------------------- .../neurun/src/backend/cpu/InitializerGenerator.h | 55 ----- .../src/backend/interface/IInitializerGenerator.h | 72 ------- runtimes/neurun/src/codegen/IPlanBuilder.h | 2 - runtimes/neurun/src/codegen/PlanBuilder.cc | 8 - runtimes/neurun/src/codegen/PlanBuilder.h | 4 - 8 files changed, 586 deletions(-) delete mode 100644 runtimes/neurun/src/backend/acl_cl/InitializerGenerator.cc delete mode 100644 runtimes/neurun/src/backend/acl_cl/InitializerGenerator.h delete mode 100644 runtimes/neurun/src/backend/cpu/InitializerGenerator.cc delete mode 100644 runtimes/neurun/src/backend/cpu/InitializerGenerator.h delete mode 100644 runtimes/neurun/src/backend/interface/IInitializerGenerator.h diff --git a/runtimes/neurun/src/backend/acl_cl/InitializerGenerator.cc b/runtimes/neurun/src/backend/acl_cl/InitializerGenerator.cc deleted file mode 100644 index be3d280..0000000 --- a/runtimes/neurun/src/backend/acl_cl/InitializerGenerator.cc +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "backend/acl_cl/InitializerGenerator.h" - -#include - -#include "backend/acl_cl/kernel/View.h" -#include "internal/nnapi/kernel/Reader.h" -#include "util/kernel/IndexIterator.h" - -namespace neurun -{ -namespace backend -{ -namespace acl_cl -{ - -InitializerGenerator::InitializerGenerator(const neurun::graph::operand::Set &ctx) : _ctx(ctx) -{ - // DO NOTHING -} - -Initializer InitializerGenerator::generate(const graph::operation::Conv2DNode &node) -{ - using graph::operation::Conv2DNode; - - Initializer ret; - ret.push_back({node.getInputs().at(Conv2DNode::Input::KERNEL), generateWeight(node)}); - ret.push_back({node.getInputs().at(Conv2DNode::Input::BIAS), generateBias(node)}); - return ret; -} - -Initializer InitializerGenerator::generate(const graph::operation::FullyConnectedNode &node) -{ - using graph::operation::FullyConnectedNode; - - Initializer ret; - ret.push_back({node.getInputs().at(FullyConnectedNode::Input::WEIGHT), generateWeight(node)}); - ret.push_back({node.getInputs().at(FullyConnectedNode::Input::BIAS), generateBias(node)}); - return ret; -} - -InitializerFn InitializerGenerator::generateWeight(const graph::operation::Conv2DNode &node) -{ - const auto ker_index{node.getInputs().at(1)}; - - const auto ker_shape = _ctx.at(ker_index).shape().asKernel(); - auto ker_base = _ctx.at(ker_index).data().base(); - auto ker_size = _ctx.at(ker_index).data().size(); - - return [ker_shape, ker_base, ker_size](::arm_compute::ITensor &tensor) { - const ::internal::nnapi::kernel::Reader from{ker_shape, ker_base, ker_size}; - ::internal::arm_compute::kernel::View into{&tensor}; - - ::nnfw::util::kernel::iterate(ker_shape) - << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) { - const auto value = from.at(nth, ch, row, col); - into.at(nth, ch, row, col) = value; - }; - }; -} - -InitializerFn InitializerGenerator::generateWeight(const graph::operation::FullyConnectedNode &node) -{ - const auto weight_index{node.getInputs().at(1)}; - const auto input_index{node.getInputs().at(0)}; - - const auto num_output = _ctx.at(weight_index).shape().dim(0); - auto weight_base = _ctx.at(weight_index).data().base(); - auto weight_size = _ctx.at(weight_index).data().size(); - - // NOTE We assume that input is a feature map - // TODO Remove this restriction! - const auto ifm_shape = _ctx.at(input_index).shape().asFeature(); - - return [num_output, ifm_shape, weight_base, weight_size](::arm_compute::ITensor &tensor) { - const ::nnfw::util::kernel::Shape ker_shape{num_output, ifm_shape.C, ifm_shape.H, ifm_shape.W}; - const ::internal::nnapi::kernel::Reader from{ker_shape, weight_base, weight_size}; - - ::nnfw::util::kernel::iterate(ker_shape) - << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) { - const auto value = from.at(nth, ch, row, col); - - uint32_t offset = 0; - - // ARM Compute Library uses 'NCHW' ordering - offset += nth * ifm_shape.C * ifm_shape.H * ifm_shape.W; - offset += ch * ifm_shape.H * ifm_shape.W; - offset += row * ifm_shape.W; - offset += col; - - const ::arm_compute::Coordinates coordinate{offset}; - - auto into = reinterpret_cast(tensor.ptr_to_element(coordinate)); - - *into = value; - }; - }; -} - -InitializerFn InitializerGenerator::generateBias(const graph::operation::Conv2DNode &node) -{ - // TODO Refactor so we can reuse the common code - - const auto bias_index{node.getInputs().at(2)}; - - auto bias_base = _ctx.at(bias_index).data().base(); - const auto bias_size = _ctx.at(bias_index).shape().asVector(); - - return [bias_base, bias_size](::arm_compute::ITensor &tensor) { - for (int32_t n = 0; n < bias_size; ++n) - { - const ::arm_compute::Coordinates coordinate{n}; - - float *into = reinterpret_cast(tensor.ptr_to_element(coordinate)); - - const float *from = reinterpret_cast(bias_base) + n; - const auto value = *from; - - *into = value; - } - }; -} - -InitializerFn InitializerGenerator::generateBias(const graph::operation::FullyConnectedNode &node) -{ - const auto bias_index{node.getInputs().at(2)}; - - auto bias_base = _ctx.at(bias_index).data().base(); - const auto bias_size = _ctx.at(bias_index).shape().asVector(); - - return [bias_base, bias_size](::arm_compute::ITensor &tensor) { - for (int32_t n = 0; n < bias_size; ++n) - { - const ::arm_compute::Coordinates coordinate{n}; - - float *into = reinterpret_cast(tensor.ptr_to_element(coordinate)); - - const float *from = reinterpret_cast(bias_base) + n; - const auto value = *from; - - *into = value; - } - }; -} - -} // namespace acl_cl -} // namespace backend -} // namespace neurun diff --git a/runtimes/neurun/src/backend/acl_cl/InitializerGenerator.h b/runtimes/neurun/src/backend/acl_cl/InitializerGenerator.h deleted file mode 100644 index bf076f6..0000000 --- a/runtimes/neurun/src/backend/acl_cl/InitializerGenerator.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __NEURUN_BACKEND_ACL_CL_INITIALIZER_GENERATOR_H__ -#define __NEURUN_BACKEND_ACL_CL_INITIALIZER_GENERATOR_H__ - -#include "backend/interface/IInitializerGenerator.h" - -#include "graph/operand/Set.h" - -namespace neurun -{ -namespace backend -{ -namespace acl_cl -{ - -class InitializerGenerator : public IInitializerGenerator -{ -public: - InitializerGenerator(const neurun::graph::operand::Set &ctx); - -public: - Initializer generate(const graph::operation::Conv2DNode &node) override; - Initializer generate(const graph::operation::FullyConnectedNode &node) override; - -private: - InitializerFn generateWeight(const graph::operation::Conv2DNode &node); - InitializerFn generateWeight(const graph::operation::FullyConnectedNode &node); - - InitializerFn generateBias(const graph::operation::Conv2DNode &node); - InitializerFn generateBias(const graph::operation::FullyConnectedNode &node); - -private: - const neurun::graph::operand::Set &_ctx; -}; - -} // namespace acl_cl -} // namespace backend -} // namespace neurun - -#endif // __NEURUN_BACKEND_ACL_CL_INITIALIZER_GENERATOR_H__ diff --git a/runtimes/neurun/src/backend/cpu/InitializerGenerator.cc b/runtimes/neurun/src/backend/cpu/InitializerGenerator.cc deleted file mode 100644 index f415c71..0000000 --- a/runtimes/neurun/src/backend/cpu/InitializerGenerator.cc +++ /dev/null @@ -1,227 +0,0 @@ -/* - * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "InitializerGenerator.h" - -#include "internal/nnapi/kernel/Reader.h" -#include "internal/nnapi/kernel/View.h" -#include "util/kernel/IndexIterator.h" - -#include "NeuralNetworks.h" - -namespace neurun -{ -namespace backend -{ -namespace cpu -{ - -InitializerGenerator::InitializerGenerator(const neurun::graph::operand::Set &ctx) : _ctx(ctx) -{ - // DO NOTHING -} - -Initializer InitializerGenerator::generate(const graph::operation::Conv2DNode &node) -{ - using graph::operation::Conv2DNode; - - Initializer ret; - ret.push_back({node.getInputs().at(Conv2DNode::Input::KERNEL), generateWeight(node)}); - ret.push_back({node.getInputs().at(Conv2DNode::Input::BIAS), generateBias(node)}); - return ret; -} - -Initializer InitializerGenerator::generate(const graph::operation::FullyConnectedNode &node) -{ - using graph::operation::FullyConnectedNode; - - Initializer ret; - ret.push_back({node.getInputs().at(FullyConnectedNode::Input::WEIGHT), generateWeight(node)}); - ret.push_back({node.getInputs().at(FullyConnectedNode::Input::BIAS), generateBias(node)}); - return ret; -} - -InitializerFn InitializerGenerator::generateWeight(const graph::operation::Conv2DNode &node) -{ - const auto ker_index{node.getInputs().at(1)}; - - const auto ker_shape = _ctx.at(ker_index).shape().asKernel(); - auto ker_base = _ctx.at(ker_index).data().base(); - auto ker_size = _ctx.at(ker_index).data().size(); - - return [ker_shape, ker_base, ker_size](::arm_compute::ITensor &tensor) { - const ::internal::nnapi::kernel::Reader from{ker_shape, ker_base, ker_size}; - ::internal::nnapi::kernel::View into{&tensor}; - - ::nnfw::util::kernel::iterate(ker_shape) - << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) { - const auto value = from.at(nth, ch, row, col); - into.at(nth, row, col, ch) = value; - }; - }; -} - -InitializerFn InitializerGenerator::generateWeight(const graph::operation::FullyConnectedNode &node) -{ - const auto weight_index{node.getInputs().at(1)}; - const auto input_index{node.getInputs().at(0)}; - - const auto num_output = _ctx.at(weight_index).shape().dim(0); - auto weight_base = _ctx.at(weight_index).data().base(); - auto weight_size = _ctx.at(weight_index).data().size(); - auto weight_type = _ctx.at(weight_index).typeInfo().type(); - - // NOTE We assume that input is a feature map - // TODO Remove this restriction! - const auto ifm_shape = _ctx.at(input_index).shape().asFeature(); - - switch (weight_type) - { - case ::neurun::graph::operand::DataType::TENSOR_FLOAT32: - { - return [num_output, ifm_shape, weight_base, weight_size](::arm_compute::ITensor &tensor) { - const ::nnfw::util::kernel::Shape ker_shape{num_output, ifm_shape.C, ifm_shape.H, - ifm_shape.W}; - const ::internal::nnapi::kernel::Reader from{ker_shape, weight_base, weight_size}; - - ::nnfw::util::kernel::iterate(ker_shape) - << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) { - const auto value = from.at(nth, ch, row, col); - - uint32_t offset = 0; - - // NNAPI uses NHWC ordering - offset += nth * ifm_shape.H * ifm_shape.W * ifm_shape.C; - offset += row * ifm_shape.W * ifm_shape.C; - offset += col * ifm_shape.C; - offset += ch; - - const ::arm_compute::Coordinates coordinate{offset}; - - auto into = reinterpret_cast(tensor.ptr_to_element(coordinate)); - - *into = value; - }; - }; - } - case ::neurun::graph::operand::DataType::TENSOR_QUANT8_ASYMM: - { - return [num_output, ifm_shape, weight_base, weight_size](::arm_compute::ITensor &tensor) { - const ::nnfw::util::kernel::Shape ker_shape{num_output, ifm_shape.C, ifm_shape.H, - ifm_shape.W}; - const ::internal::nnapi::kernel::Reader from{ker_shape, weight_base, weight_size}; - ::nnfw::util::kernel::iterate(ker_shape) - << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) { - const auto value = from.at(nth, ch, row, col); - uint32_t offset = 0; - - // NNAPI uses NHWC ordering - offset += nth * ifm_shape.H * ifm_shape.W * ifm_shape.C; - offset += row * ifm_shape.W * ifm_shape.C; - offset += col * ifm_shape.C; - offset += ch; - - const ::arm_compute::Coordinates coordinate{offset}; - - auto into = reinterpret_cast(tensor.ptr_to_element(coordinate)); - - *into = value; - }; - }; - } - default: - { - throw std::runtime_error("Not supported weight type"); - } - } -} - -InitializerFn InitializerGenerator::generateBias(const graph::operation::Conv2DNode &node) -{ - // TODO Refactor so we can reuse the common code - - const auto bias_index{node.getInputs().at(2)}; - - auto bias_base = _ctx.at(bias_index).data().base(); - const auto bias_size = _ctx.at(bias_index).shape().asVector(); - - return [bias_base, bias_size](::arm_compute::ITensor &tensor) { - for (int32_t n = 0; n < bias_size; ++n) - { - const ::arm_compute::Coordinates coordinate{n}; - - float *into = reinterpret_cast(tensor.ptr_to_element(coordinate)); - - const float *from = reinterpret_cast(bias_base) + n; - const auto value = *from; - - *into = value; - } - }; -} - -InitializerFn InitializerGenerator::generateBias(const graph::operation::FullyConnectedNode &node) -{ - const auto bias_index{node.getInputs().at(2)}; - - auto bias_base = _ctx.at(bias_index).data().base(); - auto bias_type = _ctx.at(bias_index).typeInfo().type(); - const auto bias_size = _ctx.at(bias_index).shape().asVector(); - - switch (bias_type) - { - case ::neurun::graph::operand::DataType::TENSOR_FLOAT32: - { - return [bias_base, bias_size](::arm_compute::ITensor &tensor) { - for (int32_t n = 0; n < bias_size; ++n) - { - const ::arm_compute::Coordinates coordinate{n}; - - float *into = reinterpret_cast(tensor.ptr_to_element(coordinate)); - - const float *from = reinterpret_cast(bias_base) + n; - const auto value = *from; - - *into = value; - } - }; - } - case ::neurun::graph::operand::DataType::TENSOR_QUANT8_ASYMM: - { - return [bias_base, bias_size](::arm_compute::ITensor &tensor) { - for (int32_t n = 0; n < bias_size; ++n) - { - const ::arm_compute::Coordinates coordinate{n}; - - uint8_t *into = reinterpret_cast(tensor.ptr_to_element(coordinate)); - - const uint8_t *from = reinterpret_cast(bias_base) + n; - const auto value = *from; - - *into = value; - } - }; - } - default: - { - throw std::runtime_error("Not supported bias type"); - } - } -} - -} // namespace cpu -} // namespace backend -} // namespace neurun diff --git a/runtimes/neurun/src/backend/cpu/InitializerGenerator.h b/runtimes/neurun/src/backend/cpu/InitializerGenerator.h deleted file mode 100644 index 859504a..0000000 --- a/runtimes/neurun/src/backend/cpu/InitializerGenerator.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __NEURUN_BACKEND_CPU_INITIALIZER_GENERATOR_H__ -#define __NEURUN_BACKEND_CPU_INITIALIZER_GENERATOR_H__ - -#include "backend/interface/IInitializerGenerator.h" - -#include "graph/operand/Set.h" - -namespace neurun -{ -namespace backend -{ -namespace cpu -{ - -class InitializerGenerator : public IInitializerGenerator -{ -public: - InitializerGenerator(const neurun::graph::operand::Set &ctx); - -public: - Initializer generate(const graph::operation::Conv2DNode &node) override; - Initializer generate(const graph::operation::FullyConnectedNode &node) override; - -private: - InitializerFn generateWeight(const graph::operation::Conv2DNode &node); - InitializerFn generateWeight(const graph::operation::FullyConnectedNode &node); - - InitializerFn generateBias(const graph::operation::Conv2DNode &node); - InitializerFn generateBias(const graph::operation::FullyConnectedNode &node); - -private: - const neurun::graph::operand::Set &_ctx; -}; - -} // namespace cpu -} // namespace backend -} // namespace neurun - -#endif // __NEURUN_BACKEND_CPU_INITIALIZER_GENERATOR_H__ diff --git a/runtimes/neurun/src/backend/interface/IInitializerGenerator.h b/runtimes/neurun/src/backend/interface/IInitializerGenerator.h deleted file mode 100644 index 6aca1e4..0000000 --- a/runtimes/neurun/src/backend/interface/IInitializerGenerator.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __NEURUN_BACKEND_IINITIALIZER_GENERATOR_H__ -#define __NEURUN_BACKEND_IINITIALIZER_GENERATOR_H__ - -#include - -#include "arm_compute/core/ITensor.h" - -#include "graph/operand/Index.h" -#include "graph/operation/Conv2D.h" -#include "graph/operation/MaxPool2D.h" -#include "graph/operation/AvgPool2D.h" -#include "graph/operation/Concat.h" -#include "graph/operation/FullyConnected.h" -#include "graph/operation/Reshape.h" -#include "graph/operation/Softmax.h" -#include "graph/operation/NOP.h" -#include "graph/operation/Permute.h" -#include "graph/operation/Add.h" - -using InitializerFn = std::function; - -struct InitializerEntry -{ - neurun::graph::operand::Index index; - InitializerFn fn; -}; - -using Initializer = std::list; - -namespace neurun -{ -namespace backend -{ - -struct IInitializerGenerator -{ - virtual ~IInitializerGenerator() = default; - - virtual Initializer generate(const graph::operation::Conv2DNode &) { return Initializer{}; } - virtual Initializer generate(const graph::operation::MaxPool2DNode &) { return Initializer{}; } - virtual Initializer generate(const graph::operation::AvgPool2DNode &) { return Initializer{}; } - virtual Initializer generate(const graph::operation::ConcatNode &) { return Initializer{}; } - virtual Initializer generate(const graph::operation::FullyConnectedNode &) - { - return Initializer{}; - } - virtual Initializer generate(const graph::operation::ReshapeNode &) { return Initializer{}; } - virtual Initializer generate(const graph::operation::SoftmaxNode &) { return Initializer{}; } - virtual Initializer generate(const graph::operation::NOPNode &) { return Initializer{}; } - virtual Initializer generate(const graph::operation::PermuteNode &) { return Initializer{}; } - virtual Initializer generate(const graph::operation::AddNode &) { return Initializer{}; } -}; - -} // namespace backend -} // namespace neurun -#endif // __NEURUN_BACKEND_IINITIALIZER_GENERATOR_H__ diff --git a/runtimes/neurun/src/codegen/IPlanBuilder.h b/runtimes/neurun/src/codegen/IPlanBuilder.h index e37766a..8ada9a5 100644 --- a/runtimes/neurun/src/codegen/IPlanBuilder.h +++ b/runtimes/neurun/src/codegen/IPlanBuilder.h @@ -19,7 +19,6 @@ #include "arm_compute/core/TensorInfo.h" #include "backend/interface/IStageGenerator.h" -#include "backend/interface/IInitializerGenerator.h" namespace neurun { @@ -32,7 +31,6 @@ struct IPlanBuilder virtual void addShapeConstr(const ::neurun::graph::operand::Index &ind, const ::arm_compute::TensorInfo &info) = 0; - virtual void addInitializer(const Initializer &initializer) = 0; virtual void addStage(const Stage &) = 0; }; diff --git a/runtimes/neurun/src/codegen/PlanBuilder.cc b/runtimes/neurun/src/codegen/PlanBuilder.cc index 76187c7..c1f92b0 100644 --- a/runtimes/neurun/src/codegen/PlanBuilder.cc +++ b/runtimes/neurun/src/codegen/PlanBuilder.cc @@ -29,14 +29,6 @@ void PlanBuilder::addShapeConstr(const ::neurun::graph::operand::Index &ind, _tensor_info_ctx[ind.asInt()] = info; } -void PlanBuilder::addInitializer(const Initializer &initializer) -{ - for (auto &entry : initializer) - { - _initializer_ctx[entry.index.asInt()] = entry.fn; - } -} - void PlanBuilder::addStage(const Stage &stage) { _stages.emplace_back(stage); } void PlanBuilder::finalize(const backend::TensorBuilderSet &tensor_builders) diff --git a/runtimes/neurun/src/codegen/PlanBuilder.h b/runtimes/neurun/src/codegen/PlanBuilder.h index 243d2a4..a3a7844 100644 --- a/runtimes/neurun/src/codegen/PlanBuilder.h +++ b/runtimes/neurun/src/codegen/PlanBuilder.h @@ -58,9 +58,6 @@ public: const ::arm_compute::TensorInfo &info) override; public: - void addInitializer(const Initializer &initializer) override; - -public: void addStage(const Stage &stage) override; public: @@ -75,7 +72,6 @@ private: private: std::map _tensor_info_ctx; - std::map _initializer_ctx; std::vector _stages; }; -- 2.7.4