From 9c2cfaaada66f323d10e25ac961ce1524d7b5f1f Mon Sep 17 00:00:00 2001
From: Shilei Tian <i@tianshilei.me>
Date: Thu, 19 Jan 2023 22:24:23 -0500
Subject: [PATCH] [Clang][OpenMP] Allow `f16` literal suffix when compiling
 OpenMP target offloading for NVPTX

Fix #58087.

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D142075
---
 clang/lib/Lex/LiteralSupport.cpp   |  8 ++++++--
 clang/test/OpenMP/float16_sema.cpp | 10 ++++++++++
 2 files changed, 16 insertions(+), 2 deletions(-)
 create mode 100644 clang/test/OpenMP/float16_sema.cpp

diff --git a/clang/lib/Lex/LiteralSupport.cpp b/clang/lib/Lex/LiteralSupport.cpp
index fb2b146..421a853 100644
--- a/clang/lib/Lex/LiteralSupport.cpp
+++ b/clang/lib/Lex/LiteralSupport.cpp
@@ -943,9 +943,13 @@ NumericLiteralParser::NumericLiteralParser(StringRef TokSpelling,
 
       // CUDA host and device may have different _Float16 support, therefore
       // allows f16 literals to avoid false alarm.
+      // When we compile for OpenMP target offloading on NVPTX, f16 suffix
+      // should also be supported.
       // ToDo: more precise check for CUDA.
-      if ((Target.hasFloat16Type() || LangOpts.CUDA) && s + 2 < ThisTokEnd &&
-          s[1] == '1' && s[2] == '6') {
+      // TODO: AMDGPU might also support it in the future.
+      if ((Target.hasFloat16Type() || LangOpts.CUDA ||
+           (LangOpts.OpenMPIsDevice && Target.getTriple().isNVPTX())) &&
+          s + 2 < ThisTokEnd && s[1] == '1' && s[2] == '6') {
         s += 2; // success, eat up 2 characters.
         isFloat16 = true;
         continue;
diff --git a/clang/test/OpenMP/float16_sema.cpp b/clang/test/OpenMP/float16_sema.cpp
new file mode 100644
index 0000000..4b9f339
--- /dev/null
+++ b/clang/test/OpenMP/float16_sema.cpp
@@ -0,0 +1,10 @@
+// RUN: %clang_cc1 -fsyntax-only -x c++ -triple x86_64-unknown-linux-gnu -fopenmp -fopenmp-targets=nvptx64 -verify %s
+// expected-no-diagnostics
+
+int foo() {
+#pragma omp target
+  {
+    __fp16 a = -1.0f16;
+  }
+  return 0;
+}
-- 
2.7.4