From 9c277321e3dcc9fe979e2407320a902a2b7cf513 Mon Sep 17 00:00:00 2001 From: Manoj Gupta Date: Wed, 27 Sep 2017 09:29:57 +0000 Subject: [PATCH] [Builtins] ARM: Fix msr assembly instruction use for Thumb2. Summary: MSR instruction in Thumb2 does not support immediate operand. Fix this by moving the condition for V7-M to Thumb2 since V7-M support Thumb2 only. With this change, aeabi_cfcmp.s and aeabi_cdcmp.S files can be assembled in Thumb2 mode. (This is split out from the review D38227). Reviewers: compnerd, peter.smith, srhines, weimingz, rengolin, kristof.beyls Reviewed By: compnerd Subscribers: aemerson, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D38268 llvm-svn: 314284 --- compiler-rt/lib/builtins/arm/aeabi_cdcmp.S | 2 +- compiler-rt/lib/builtins/arm/aeabi_cfcmp.S | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S b/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S index b06f294..f18cfa4 100644 --- a/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S +++ b/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S @@ -48,7 +48,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cdcmpeq) // NaN has been ruled out, so __aeabi_cdcmple can't trap bne __aeabi_cdcmple -#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) +#if defined(USE_THUMB_2) mov ip, #APSR_C msr APSR_nzcvq, ip #else diff --git a/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S b/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S index 7bc8407..fc0dbca 100644 --- a/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S +++ b/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S @@ -48,7 +48,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmpeq) // NaN has been ruled out, so __aeabi_cfcmple can't trap bne __aeabi_cfcmple -#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) +#if defined(USE_THUMB_2) mov ip, #APSR_C msr APSR_nzcvq, ip #else -- 2.7.4