From 9bc47f11525fb666a370063888904160188b024e Mon Sep 17 00:00:00 2001 From: David Hildenbrand Date: Tue, 4 Apr 2023 10:56:36 +0200 Subject: [PATCH] m68k/mm: use correct bit number in _PAGE_SWP_EXCLUSIVE comment As noticed by Geert, commit b5c88f21531c ("microblaze/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE") modified m68k code by accident. While replacing 0x080 by CF_PAGE_NOCACHE is correct, although it should have been part of commit ed4154067a08 ("m68k/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE"), replacing "bit 7" by "bit 24" in the comment was wrong. Let's revert to the previous, correct, comment. Link: https://lkml.kernel.org/r/20230404085636.121409-1-david@redhat.com Signed-off-by: David Hildenbrand Reported-by: Geert Uytterhoeven Signed-off-by: Andrew Morton --- arch/m68k/include/asm/mcf_pgtable.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/m68k/include/asm/mcf_pgtable.h b/arch/m68k/include/asm/mcf_pgtable.h index 13741c1..d97fbb8 100644 --- a/arch/m68k/include/asm/mcf_pgtable.h +++ b/arch/m68k/include/asm/mcf_pgtable.h @@ -46,7 +46,7 @@ #define _CACHEMASK040 (~0x060) #define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */ -/* We borrow bit 24 to store the exclusive marker in swap PTEs. */ +/* We borrow bit 7 to store the exclusive marker in swap PTEs. */ #define _PAGE_SWP_EXCLUSIVE CF_PAGE_NOCACHE /* -- 2.7.4