From 9ba23490b01e3b6aa733d064cd50ac8fc4f2e889 Mon Sep 17 00:00:00 2001
From: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Mon, 6 Dec 2010 14:42:56 +0000
Subject: [PATCH] Turn on unaligned SSE load/store for Core i7.

2010-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386.c (m_COREI7): New.
	(initial_ix86_tune_features): Turn on
	X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL and
	X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL for Core i7.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@167496 138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog          | 7 +++++++
 gcc/config/i386/i386.c | 5 +++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6c21b40..b2d4d6d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
 2010-12-06  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* config/i386/i386.c (m_COREI7): New.
+	(initial_ix86_tune_features): Turn on
+	X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL and
+	X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL for Core i7.
+
+2010-12-06  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* config.gcc: Allow corei7-avx for --with-arch/--with-cpu.
 
 	* config/i386/driver-i386.c (host_detect_local_cpu): Support
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c80a479..e9c14d0 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1644,6 +1644,7 @@ const struct processor_costs *ix86_cost = &pentium_cost;
 #define m_CORE2_64  (1<<PROCESSOR_CORE2_64)
 #define m_COREI7_32  (1<<PROCESSOR_COREI7_32)
 #define m_COREI7_64  (1<<PROCESSOR_COREI7_64)
+#define m_COREI7  (m_COREI7_32 | m_COREI7_64)
 #define m_CORE2I7_32  (m_CORE2_32 | m_COREI7_32)
 #define m_CORE2I7_64  (m_CORE2_64 | m_COREI7_64)
 #define m_CORE2I7  (m_CORE2I7_32 | m_CORE2I7_64)
@@ -1810,10 +1811,10 @@ static unsigned int initial_ix86_tune_features[X86_TUNE_LAST] = {
   | m_AMDFAM10 | m_BDVER1,
 
   /* X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL */
-  m_AMDFAM10 | m_BDVER1,
+  m_AMDFAM10 | m_BDVER1 | m_COREI7,
 
   /* X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL */
-  m_BDVER1,
+  m_BDVER1 | m_COREI7,
 
   /* X86_TUNE_SSE_PACKED_SINGLE_INSN_OPTIMAL */
   m_BDVER1,
-- 
2.7.4