From 9b8e6ee867a146d6a795cfb5f8ccb51f5c4953b3 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Thu, 3 Aug 2023 11:33:40 +0200 Subject: [PATCH] media: ov2680: Add a bunch of register tweaks Usually when developing a sensor driver with help from the vendor the vendor will provide a bunch of register tweaks for optimal performance of the sensor. The atomisp-ov2680.c driver was (presumably) developed by Intel with help from OmniVision and indeed contains a bunch of register tweaks. Add these register tweaks to the "main" ov2680.c driver. Acked-by: Rui Miguel Silva Reviewed-by: Daniel Scally Signed-off-by: Hans de Goede Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/ov2680.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/media/i2c/ov2680.c b/drivers/media/i2c/ov2680.c index b251265..e6c99c1 100644 --- a/drivers/media/i2c/ov2680.c +++ b/drivers/media/i2c/ov2680.c @@ -180,18 +180,71 @@ static const int ov2680_hv_flip_bayer_order[] = { }; static const struct reg_sequence ov2680_global_setting[] = { + /* MIPI PHY, 0x10 -> 0x1c enable bp_c_hs_en_lat and bp_d_hs_en_lat */ + {0x3016, 0x1c}, + /* R MANUAL set exposure and gain to manual (hw does not do auto) */ {0x3503, 0x03}, + /* Analog control register tweaks */ + {0x3603, 0x39}, /* Reset value 0x99 */ + {0x3604, 0x24}, /* Reset value 0x74 */ + {0x3621, 0x37}, /* Reset value 0x44 */ + + /* Sensor control register tweaks */ + {0x3701, 0x64}, /* Reset value 0x61 */ + {0x3705, 0x3c}, /* Reset value 0x21 */ + {0x370c, 0x50}, /* Reset value 0x10 */ + {0x370d, 0xc0}, /* Reset value 0x00 */ + {0x3718, 0x88}, /* Reset value 0x80 */ + + /* PSRAM tweaks */ + {0x3781, 0x80}, /* Reset value 0x00 */ + {0x3784, 0x0c}, /* Reset value 0x00, based on OV2680_R1A_AM10.ovt */ + {0x3789, 0x60}, /* Reset value 0x50 */ + + /* BLC CTRL00 0x01 -> 0x81 set avg_weight to 8 */ + {0x4000, 0x81}, + /* Set black level compensation range to 0 - 3 (default 0 - 11) */ {0x4008, 0x00}, {0x4009, 0x03}, + /* VFIFO R2 0x00 -> 0x02 set Frame reset enable */ + {0x4602, 0x02}, + + /* MIPI ctrl CLK PREPARE MIN change from 0x26 (38) -> 0x36 (54) */ + {0x481f, 0x36}, + + /* MIPI ctrl CLK LPX P MIN change from 0x32 (50) -> 0x36 (54) */ + {0x4825, 0x36}, + + /* R ISP CTRL2 0x20 -> 0x30, set sof_sel bit */ + {0x5002, 0x30}, + /* * Window CONTROL 0x00 -> 0x01, enable manual window control, * this is necessary for full size flip and mirror support. */ {0x5708, 0x01}, + + /* + * DPC CTRL0 0x14 -> 0x3e, set enable_tail, enable_3x3_cluster + * and enable_general_tail bits based OV2680_R1A_AM10.ovt. + */ + {0x5780, 0x3e}, + + /* DPC MORE CONNECTION CASE THRE 0x0c (12) -> 0x02 (2) */ + {0x5788, 0x02}, + + /* DPC GAIN LIST1 0x0f (15) -> 0x08 (8) */ + {0x578e, 0x08}, + + /* DPC GAIN LIST2 0x3f (63) -> 0x0c (12) */ + {0x578f, 0x0c}, + + /* DPC THRE RATIO 0x04 (4) -> 0x00 (0) */ + {0x5792, 0x00}, }; static struct ov2680_dev *to_ov2680_dev(struct v4l2_subdev *sd) -- 2.7.4