From 9b22bdc956bcfd53fdb821bba6d7451cbea2358b Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Sun, 29 Jan 2023 08:27:05 -0800 Subject: [PATCH] freedreno/a6xx: Also FLUSH_CACHE on image barrier For the same reason we need to on an UPDATE_BUFFER barrier. Fixes KHR-GLES31.core.compute_shader.pipeline-post-fs once the hard-coded cache-flush is removed from launch_grid path. Signed-off-by: Rob Clark Part-of: --- src/gallium/drivers/freedreno/a6xx/fd6_barrier.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_barrier.c b/src/gallium/drivers/freedreno/a6xx/fd6_barrier.c index 15fdbb7..176d3d5 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_barrier.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_barrier.c @@ -177,7 +177,6 @@ fd6_memory_barrier(struct pipe_context *pctx, unsigned flags) unsigned flushes = 0; if (flags & (PIPE_BARRIER_SHADER_BUFFER | - PIPE_BARRIER_IMAGE | PIPE_BARRIER_CONSTANT_BUFFER | PIPE_BARRIER_VERTEX_BUFFER | PIPE_BARRIER_INDEX_BUFFER | @@ -186,6 +185,7 @@ fd6_memory_barrier(struct pipe_context *pctx, unsigned flags) } if (flags & (PIPE_BARRIER_TEXTURE | + PIPE_BARRIER_IMAGE | PIPE_BARRIER_INDIRECT_BUFFER | PIPE_BARRIER_UPDATE_BUFFER | PIPE_BARRIER_UPDATE_TEXTURE)) { -- 2.7.4