From 9aa884ccc2697565d7eb044fdbbec8a5db02a316 Mon Sep 17 00:00:00 2001 From: Qiu Chaofan Date: Mon, 30 Mar 2020 17:46:12 +0800 Subject: [PATCH] [NFC] [PowerPC] Update and add tests for ori Use script to update test for ori with 32-bit imms, and add test for ori with 64-bit imms. --- llvm/test/CodeGen/PowerPC/ori_imm32.ll | 83 ++++++++++++++++++++-------------- llvm/test/CodeGen/PowerPC/ori_imm64.ll | 52 +++++++++++++++++++++ 2 files changed, 101 insertions(+), 34 deletions(-) create mode 100644 llvm/test/CodeGen/PowerPC/ori_imm64.ll diff --git a/llvm/test/CodeGen/PowerPC/ori_imm32.ll b/llvm/test/CodeGen/PowerPC/ori_imm32.ll index 5444a5b..245c9bd 100644 --- a/llvm/test/CodeGen/PowerPC/ori_imm32.ll +++ b/llvm/test/CodeGen/PowerPC/ori_imm32.ll @@ -1,96 +1,111 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s define i64 @ori_test_a(i64 %a) { +; CHECK-LABEL: ori_test_a: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: ori 3, 3, 65535 +; CHECK-NEXT: oris 3, 3, 65535 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @ori_test_a -; CHECK-DAG: ori 3, 3, 65535 -; CHECK-DAG: oris 3, 3, 65535 -; CHECK-NEXT: blr %or = or i64 %a, 4294967295 ret i64 %or } define i64 @ori_test_b(i64 %a) { +; CHECK-LABEL: ori_test_b: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: li 4, 1 +; CHECK-NEXT: sldi 4, 4, 32 +; CHECK-NEXT: or 3, 3, 4 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @ori_test_b -; CHECK: or 3, 3, {{[0-9]+}} -; CHECK-NEXT: blr %or = or i64 %a, 4294967296 ret i64 %or } define i64 @ori_test_c(i64 %a) { +; CHECK-LABEL: ori_test_c: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: ori 3, 3, 65535 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @ori_test_c -; CHECK: ori 3, 3, 65535 -; CHECK-NEXT: blr %or = or i64 %a, 65535 ret i64 %or } define i64 @ori_test_d(i64 %a) { +; CHECK-LABEL: ori_test_d: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: oris 3, 3, 1 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @ori_test_d -; CHECK: oris 3, 3, 1 -; CHECK-NEXT: blr %or = or i64 %a, 65536 ret i64 %or } define zeroext i32 @ori_test_e(i32 zeroext %a) { +; CHECK-LABEL: ori_test_e: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: ori 3, 3, 65535 +; CHECK-NEXT: oris 3, 3, 255 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @ori_test_e -; CHECK-DAG: ori 3, 3, 65535 -; CHECK-DAG: oris 3, 3, 255 -; CHECK-NEXT: blr %or = or i32 %a, 16777215 ret i32 %or } define i64 @xori_test_a(i64 %a) { +; CHECK-LABEL: xori_test_a: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xori 3, 3, 65535 +; CHECK-NEXT: xoris 3, 3, 65535 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @xori_test_a -; CHECK-DAG: xori 3, 3, 65535 -; CHECK-DAG: xoris 3, 3, 65535 -; CHECK-NEXT: blr %xor = xor i64 %a, 4294967295 ret i64 %xor } define i64 @xori_test_b(i64 %a) { +; CHECK-LABEL: xori_test_b: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: li 4, 1 +; CHECK-NEXT: sldi 4, 4, 32 +; CHECK-NEXT: xor 3, 3, 4 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @xori_test_b -; CHECK: xor 3, 3, {{[0-9]+}} -; CHECK-NEXT: blr %xor = xor i64 %a, 4294967296 ret i64 %xor } define i64 @xori_test_c(i64 %a) { +; CHECK-LABEL: xori_test_c: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xori 3, 3, 65535 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @xori_test_c -; CHECK: xori 3, 3, 65535 -; CHECK-NEXT: blr %xor = xor i64 %a, 65535 ret i64 %xor } define i64 @xori_test_d(i64 %a) { +; CHECK-LABEL: xori_test_d: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xoris 3, 3, 1 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @xori_test_d -; CHECK: xoris 3, 3, 1 -; CHECK-NEXT: blr %xor = xor i64 %a, 65536 ret i64 %xor } define zeroext i32 @xori_test_e(i32 zeroext %a) { +; CHECK-LABEL: xori_test_e: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xori 3, 3, 65535 +; CHECK-NEXT: xoris 3, 3, 255 +; CHECK-NEXT: blr entry: -; CHECK-LABEL: @xori_test_e -; CHECK-DAG: xori 3, 3, 65535 -; CHECK-DAG: xoris 3, 3, 255 -; CHECK-NEXT: blr %xor = xor i32 %a, 16777215 ret i32 %xor } diff --git a/llvm/test/CodeGen/PowerPC/ori_imm64.ll b/llvm/test/CodeGen/PowerPC/ori_imm64.ll new file mode 100644 index 0000000..d2ea911 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/ori_imm64.ll @@ -0,0 +1,52 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s + +define i64 @ori_test_1(i64 %a) { +; CHECK-LABEL: ori_test_1: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: li 3, -1 +; CHECK-NEXT: blr +entry: + %or = or i64 %a, 18446744073709551615 ; 0xffffffffffffffff + ret i64 %or +} + +define i64 @ori_test_2(i64 %a) { +; CHECK-LABEL: ori_test_2: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: lis 4, 15 +; CHECK-NEXT: ori 4, 4, 65535 +; CHECK-NEXT: sldi 4, 4, 29 +; CHECK-NEXT: or 3, 3, 4 +; CHECK-NEXT: blr +entry: + %or = or i64 %a, 562949416550400 ; 0x1ffffe0000000 + ret i64 %or +} + +define i64 @ori_test_3(i64 %a) { +; CHECK-LABEL: ori_test_3: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: lis 4, -32768 +; CHECK-NEXT: rldicr 4, 4, 36, 63 +; CHECK-NEXT: or 3, 3, 4 +; CHECK-NEXT: blr +entry: + %or = or i64 %a, 68719476728 ; 0xffffffff8 + ret i64 %or +} + +define i64 @ori_test_4(i64 %a) { +; CHECK-LABEL: ori_test_4: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: li 4, 4112 +; CHECK-NEXT: sldi 4, 4, 32 +; CHECK-NEXT: oris 4, 4, 4112 +; CHECK-NEXT: ori 4, 4, 65535 +; CHECK-NEXT: or 3, 3, 4 +; CHECK-NEXT: blr +entry: + %or = or i64 %a, 17661175070719 ; 0x10101010ffff + ret i64 %or +} -- 2.7.4