From 9a2cca929f9f43ae288908efbf05647167a96728 Mon Sep 17 00:00:00 2001 From: Rafael Antognolli Date: Tue, 6 Jun 2017 09:49:11 -0700 Subject: [PATCH] i965: Remove upload_gs_state_for_tf. This function only emits a particular case of 3DSTATE_GS. Instead, we can do that inside genX(upload_gs_state), and later reuse part of that code for emitting gen4-5 state. There's the additional benefit of allowing us to remove gen6_gs_state.c, which was only left because of this function. Signed-off-by: Rafael Antognolli Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/Makefile.sources | 1 - src/mesa/drivers/dri/i965/brw_state.h | 2 - src/mesa/drivers/dri/i965/gen6_gs_state.c | 56 --------------------------- src/mesa/drivers/dri/i965/genX_state_upload.c | 17 +++++++- 4 files changed, 16 insertions(+), 60 deletions(-) delete mode 100644 src/mesa/drivers/dri/i965/gen6_gs_state.c diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources index 5fe5757..552710d 100644 --- a/src/mesa/drivers/dri/i965/Makefile.sources +++ b/src/mesa/drivers/dri/i965/Makefile.sources @@ -68,7 +68,6 @@ i965_FILES = \ gen6_clip_state.c \ gen6_constant_state.c \ gen6_depth_state.c \ - gen6_gs_state.c \ gen6_multisample_state.c \ gen6_queryobj.c \ gen6_sampler_state.c \ diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 748faba..8f78b04 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -355,8 +355,6 @@ void gen8_init_atoms(struct brw_context *brw); void gen9_init_atoms(struct brw_context *brw); void gen10_init_atoms(struct brw_context *brw); -void upload_gs_state_for_tf(struct brw_context *brw); - /* Memory Object Control State: * Specifying zero for L3 means "uncached in L3", at least on Haswell * and Baytrail, since there are no PTE flags for setting L3 cacheability. diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c deleted file mode 100644 index 6450c76..0000000 --- a/src/mesa/drivers/dri/i965/gen6_gs_state.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright © 2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Eric Anholt - * - */ - -#include "brw_context.h" -#include "brw_state.h" -#include "brw_defines.h" -#include "intel_batchbuffer.h" -#include "main/shaderapi.h" - -void -upload_gs_state_for_tf(struct brw_context *brw) -{ - const struct gen_device_info *devinfo = &brw->screen->devinfo; - - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2)); - OUT_BATCH(brw->ff_gs.prog_offset); - OUT_BATCH(GEN6_GS_SPF_MODE | GEN6_GS_VECTOR_MASK_ENABLE); - OUT_BATCH(0); /* no scratch space */ - OUT_BATCH((2 << GEN6_GS_DISPATCH_START_GRF_SHIFT) | - (brw->ff_gs.prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT)); - OUT_BATCH(((devinfo->max_gs_threads - 1) << GEN6_GS_MAX_THREADS_SHIFT) | - GEN6_GS_STATISTICS_ENABLE | - GEN6_GS_SO_STATISTICS_ENABLE | - GEN6_GS_RENDERING_ENABLE); - OUT_BATCH(GEN6_GS_SVBI_PAYLOAD_ENABLE | - GEN6_GS_SVBI_POSTINCREMENT_ENABLE | - (brw->ff_gs.prog_data->svbi_postincrement_value << - GEN6_GS_SVBI_POSTINCREMENT_VALUE_SHIFT) | - GEN6_GS_ENABLE); - ADVANCE_BATCH(); -} diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 3281a01..62b0eea 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -2475,7 +2475,22 @@ genX(upload_gs_state)(struct brw_context *brw) /* In gen6, transform feedback for the VS stage is done with an ad-hoc GS * program. This function provides the needed 3DSTATE_GS for this. */ - upload_gs_state_for_tf(brw); + brw_batch_emit(brw, GENX(3DSTATE_GS), gs) { + gs.KernelStartPointer = KSP(brw, brw->ff_gs.prog_offset); + gs.SingleProgramFlow = true; + gs.VectorMaskEnable = true; + gs.DispatchGRFStartRegisterForURBData = 2; + gs.VertexURBEntryReadLength = brw->ff_gs.prog_data->urb_read_length; + gs.MaximumNumberofThreads = devinfo->max_gs_threads - 1; + gs.StatisticsEnable = true; + gs.SOStatisticsEnable = true; + gs.RenderingEnabled = true; + gs.SVBIPayloadEnable = true; + gs.SVBIPostIncrementEnable = true; + gs.SVBIPostIncrementValue = + brw->ff_gs.prog_data->svbi_postincrement_value; + gs.Enable = true; + } #endif } else { brw_batch_emit(brw, GENX(3DSTATE_GS), gs) { -- 2.7.4