From 99067e2973a6bb1d3a52caafb479ebdc1a420580 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Mon, 23 Mar 2015 11:40:14 +0000 Subject: [PATCH] Fix thinko with previous delta to RL78 sim, by adding code to define the G10 and G13 mode options. * cpu.c (rl78_g10_mode): Declare. (g13_multiply): Declare. * cpu.h (rl78_g10_mode): Export. (g13_multiply): Export. --- sim/rl78/ChangeLog | 7 +++++++ sim/rl78/cpu.c | 2 ++ sim/rl78/cpu.h | 5 ++++- sim/rl78/load.c | 2 +- 4 files changed, 14 insertions(+), 2 deletions(-) diff --git a/sim/rl78/ChangeLog b/sim/rl78/ChangeLog index 018b1ff..889c320 100644 --- a/sim/rl78/ChangeLog +++ b/sim/rl78/ChangeLog @@ -1,3 +1,10 @@ +2015-03-23 Nick Clifton + + * cpu.c (rl78_g10_mode): Declare. + (g13_multiply): Declare. + * cpu.h (rl78_g10_mode): Export. + (g13_multiply): Export. + 2015-03-20 Nick Clifton * load.c (rl78_load): If the G10, G13 or G14 flag bits are set in diff --git a/sim/rl78/cpu.c b/sim/rl78/cpu.c index a5056fc..32b1399 100644 --- a/sim/rl78/cpu.c +++ b/sim/rl78/cpu.c @@ -32,6 +32,8 @@ int verbose = 0; int trace = 0; int rl78_in_gdb = 1; int timer_enabled = 2; +int rl78_g10_mode = 0; +int g13_multiply = 0; #define REGISTER_ADDRESS 0xffee0 diff --git a/sim/rl78/cpu.h b/sim/rl78/cpu.h index e2457bb..0e10db9 100644 --- a/sim/rl78/cpu.h +++ b/sim/rl78/cpu.h @@ -46,7 +46,7 @@ extern const char * const reg_names[]; void init_cpu (void); void set_flags (int mask, int newbits); -void set_c (int c); +void set_c (int); int get_c (void); const char *bits (int v, int b); @@ -97,4 +97,7 @@ extern int timer_enabled; extern void dump_counts_per_insn (const char * filename); extern unsigned int counts_per_insn[0x100000]; +extern int rl78_g10_mode; +extern int g13_multiply; + #endif diff --git a/sim/rl78/load.c b/sim/rl78/load.c index 8d3a138..66d00d3 100644 --- a/sim/rl78/load.c +++ b/sim/rl78/load.c @@ -100,7 +100,7 @@ rl78_load (bfd *prog, host_callback *callbacks, const char * const simname) case E_FLAG_RL78_G14: default: break; - } + } for (i = 0; i < num_headers; i++) { -- 2.7.4