From 9824d01d5d789a57d27360c0f5e8ee44955eb1d7 Mon Sep 17 00:00:00 2001 From: Tom Musta Date: Tue, 12 Aug 2014 08:45:08 -0500 Subject: [PATCH] target-ppc: Bug Fix: mulldo OV Detection Fix the code to properly detect overflow; the 128 bit signed product must have all zeroes or all ones in the first 65 bits otherwise OV should be set. Example: R3 45F086A5D5887509 R4 0000000000000002 mulldo 3,3,4 Should set XER[OV]. Signed-off-by: Tom Musta Signed-off-by: Alexander Graf --- target-ppc/int_helper.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index f6e8846..e83a25d 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -32,12 +32,22 @@ uint64_t helper_mulldo(CPUPPCState *env, uint64_t arg1, uint64_t arg2) uint64_t tl; muls64(&tl, (uint64_t *)&th, arg1, arg2); - /* If th != 0 && th != -1, then we had an overflow */ - if (likely((uint64_t)(th + 1) <= 1)) { + + /* th should either contain all 1 bits or all 0 bits and should + * match the sign bit of tl; otherwise we have overflowed. */ + + if ((int64_t)tl < 0) { + if (likely(th == -1LL)) { + env->ov = 0; + } else { + env->so = env->ov = 1; + } + } else if (likely(th == 0LL)) { env->ov = 0; } else { env->so = env->ov = 1; } + return (int64_t)tl; } #endif -- 2.7.4