From 96dcde487e7ece6de437a55175f9a5ec5c4ecd59 Mon Sep 17 00:00:00 2001 From: Christian Kohn Date: Wed, 12 Oct 2022 11:30:33 +0200 Subject: [PATCH] ARM: zynq: DT: Enable all FCLKs by default The fclk-enable property is set to 0 which disables all FCLKs. Enable all FCLKs so they can be used as clock sources in the programmable logic. Signed-off-by: Christian Kohn Acked-by: Soren Brinkmann Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/b1308dc1f14f8eb24662019f7376c959e5e763b8.1665567031.git.michal.simek@amd.com --- arch/arm/dts/zynq-7000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index edc147d..f72ef52 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -340,7 +340,7 @@ u-boot,dm-pre-reloc; #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; - fclk-enable = <0>; + fclk-enable = <0xf>; clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", -- 2.7.4