From 968ceddca9a80197db8c785faf80fa9fc44ef7cd Mon Sep 17 00:00:00 2001 From: Nico Weber Date: Mon, 2 Mar 2015 04:37:11 +0000 Subject: [PATCH] Revert r230930, it caused PR22747. llvm-svn: 230932 --- llvm/include/llvm/CodeGen/AsmPrinter.h | 23 +++++ llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp | 44 +++++++- llvm/lib/CodeGen/AsmPrinter/ByteStreamer.h | 29 ------ llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h | 14 --- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 131 +++++++++--------------- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 +- llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp | 41 +++++--- llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h | 19 ++-- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 8 +- llvm/test/CodeGen/ARM/debug-info-qreg.ll | 8 +- llvm/test/CodeGen/ARM/debug-info-s16-reg.ll | 2 +- 11 files changed, 153 insertions(+), 169 deletions(-) diff --git a/llvm/include/llvm/CodeGen/AsmPrinter.h b/llvm/include/llvm/CodeGen/AsmPrinter.h index f5951f7..feebe92 100644 --- a/llvm/include/llvm/CodeGen/AsmPrinter.h +++ b/llvm/include/llvm/CodeGen/AsmPrinter.h @@ -434,6 +434,29 @@ public: /// Get the value for DW_AT_APPLE_isa. Zero if no isa encoding specified. virtual unsigned getISAEncoding(const Function *) { return 0; } + /// Emit a dwarf register operation for describing + /// - a small value occupying only part of a register or + /// - a register representing only part of a value. + void EmitDwarfOpPiece(ByteStreamer &Streamer, unsigned SizeInBits, + unsigned OffsetInBits = 0) const; + + + /// \brief Emit a partial DWARF register operation. + /// \param MLoc the register + /// \param PieceSize size and + /// \param PieceOffset offset of the piece in bits, if this is one + /// piece of an aggregate value. + /// + /// If size and offset is zero an operation for the entire + /// register is emitted: Some targets do not provide a DWARF + /// register number for every register. If this is the case, this + /// function will attempt to emit a DWARF register by emitting a + /// piece of a super-register or by piecing together multiple + /// subregisters that alias the register. + void EmitDwarfRegOpPiece(ByteStreamer &BS, const MachineLocation &MLoc, + unsigned PieceSize = 0, + unsigned PieceOffset = 0) const; + /// EmitDwarfRegOp - Emit a dwarf register operation. virtual void EmitDwarfRegOp(ByteStreamer &BS, const MachineLocation &MLoc) const; diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp index d602660..d0958c1 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp @@ -12,7 +12,6 @@ //===----------------------------------------------------------------------===// #include "ByteStreamer.h" -#include "DwarfDebug.h" #include "DwarfExpression.h" #include "llvm/ADT/Twine.h" #include "llvm/CodeGen/AsmPrinter.h" @@ -28,11 +27,29 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetSubtargetInfo.h" using namespace llvm; #define DEBUG_TYPE "asm-printer" +void DebugLocDwarfExpression::EmitOp(uint8_t Op, const char *Comment) { + BS.EmitInt8( + Op, Comment ? Twine(Comment) + " " + dwarf::OperationEncodingString(Op) + : dwarf::OperationEncodingString(Op)); +} + +void DebugLocDwarfExpression::EmitSigned(int Value) { + BS.EmitSLEB128(Value, Twine(Value)); +} + +void DebugLocDwarfExpression::EmitUnsigned(unsigned Value) { + BS.EmitULEB128(Value, Twine(Value)); +} + +bool DebugLocDwarfExpression::isFrameRegister(unsigned MachineReg) { + // This information is not available while emitting .debug_loc entries. + return false; +} + //===----------------------------------------------------------------------===// // Dwarf Emission Helper Routines //===----------------------------------------------------------------------===// @@ -188,11 +205,30 @@ void AsmPrinter::EmitSectionOffset(const MCSymbol *Label, EmitLabelDifference(Label, SectionLabel, 4); } +// Some targets do not provide a DWARF register number for every +// register. This function attempts to emit a DWARF register by +// emitting a piece of a super-register or by piecing together +// multiple subregisters that alias the register. +void AsmPrinter::EmitDwarfRegOpPiece(ByteStreamer &Streamer, + const MachineLocation &MLoc, + unsigned PieceSizeInBits, + unsigned PieceOffsetInBits) const { + assert(MLoc.isReg() && "MLoc must be a register"); + DebugLocDwarfExpression Expr(*this, Streamer); + Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits); +} + +void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer, + unsigned PieceSizeInBits, + unsigned PieceOffsetInBits) const { + DebugLocDwarfExpression Expr(*this, Streamer); + Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits); +} + /// EmitDwarfRegOp - Emit dwarf register operation. void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer, const MachineLocation &MLoc) const { - DebugLocDwarfExpression Expr(*TM.getSubtargetImpl()->getRegisterInfo(), - getDwarfDebug()->getDwarfVersion(), Streamer); + DebugLocDwarfExpression Expr(*this, Streamer); const MCRegisterInfo *MRI = MMI->getContext().getRegisterInfo(); int Reg = MRI->getDwarfRegNum(MLoc.getReg(), false); if (Reg < 0) { diff --git a/llvm/lib/CodeGen/AsmPrinter/ByteStreamer.h b/llvm/lib/CodeGen/AsmPrinter/ByteStreamer.h index 179a4d4..42be114 100644 --- a/llvm/lib/CodeGen/AsmPrinter/ByteStreamer.h +++ b/llvm/lib/CodeGen/AsmPrinter/ByteStreamer.h @@ -19,8 +19,6 @@ #include "llvm/ADT/ArrayRef.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/MC/MCStreamer.h" -#include "llvm/Support/LEB128.h" -#include namespace llvm { class ByteStreamer { @@ -68,33 +66,6 @@ class HashingByteStreamer : public ByteStreamer { Hash.addULEB128(DWord); } }; - -class BufferByteStreamer : public ByteStreamer { -private: - SmallVectorImpl &Buffer; - // FIXME: This is actually only needed for textual asm output. - SmallVectorImpl &Comments; - -public: - BufferByteStreamer(SmallVectorImpl &Buffer, - SmallVectorImpl &Comments) - : Buffer(Buffer), Comments(Comments) {} - void EmitInt8(uint8_t Byte, const Twine &Comment) override { - Buffer.push_back(Byte); - Comments.push_back(Comment.str()); - } - void EmitSLEB128(uint64_t DWord, const Twine &Comment) override { - raw_svector_ostream OSE(Buffer); - encodeSLEB128(DWord, OSE); - Comments.push_back(Comment.str()); - } - void EmitULEB128(uint64_t DWord, const Twine &Comment) override { - raw_svector_ostream OSE(Buffer); - encodeULEB128(DWord, OSE); - Comments.push_back(Comment.str()); - } -}; - } #endif diff --git a/llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h b/llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h index 3aa2547..6d55c03 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h +++ b/llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h @@ -9,14 +9,12 @@ #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DEBUGLOCENTRY_H #define LLVM_LIB_CODEGEN_ASMPRINTER_DEBUGLOCENTRY_H -#include "llvm/ADT/SmallString.h" #include "llvm/IR/Constants.h" #include "llvm/IR/DebugInfo.h" #include "llvm/MC/MCSymbol.h" #include "llvm/MC/MachineLocation.h" namespace llvm { -class AsmPrinter; class MDNode; /// \brief This struct describes location entries emitted in the .debug_loc /// section. @@ -86,8 +84,6 @@ private: /// A nonempty list of locations/constants belonging to this entry, /// sorted by offset. SmallVector Values; - SmallString<8> DWARFBytes; - SmallVector Comments; public: DebugLocEntry(const MCSymbol *B, const MCSymbol *E, Value Val) @@ -150,16 +146,6 @@ public: }), Values.end()); } - - void finalize(const AsmPrinter &AP, - const DITypeIdentifierMap &TypeIdentifierMap); - StringRef getDWARFBytes() const { - assert(!DWARFBytes.empty() && "DebugLocEntry not finalized?"); - return DWARFBytes; - } - const SmallVectorImpl &getComments() const { - return Comments; - } }; /// Compare two Values for equality. diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index 26297ee..aa1f79f 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -105,25 +105,6 @@ DwarfPubSections("generate-dwarf-pub-sections", cl::Hidden, static const char *const DWARFGroupName = "DWARF Emission"; static const char *const DbgTimerName = "DWARF Debug Writer"; -void DebugLocDwarfExpression::EmitOp(uint8_t Op, const char *Comment) { - BS.EmitInt8( - Op, Comment ? Twine(Comment) + " " + dwarf::OperationEncodingString(Op) - : dwarf::OperationEncodingString(Op)); -} - -void DebugLocDwarfExpression::EmitSigned(int Value) { - BS.EmitSLEB128(Value, Twine(Value)); -} - -void DebugLocDwarfExpression::EmitUnsigned(unsigned Value) { - BS.EmitULEB128(Value, Twine(Value)); -} - -bool DebugLocDwarfExpression::isFrameRegister(unsigned MachineReg) { - // This information is not available while emitting .debug_loc entries. - return false; -} - //===----------------------------------------------------------------------===// /// resolve - Look in the DwarfDebug map for the MDNode that @@ -946,9 +927,6 @@ DwarfDebug::collectVariableInfo(DwarfCompileUnit &TheCU, DISubprogram SP, // Build the location list for this variable. buildLocationList(LocList.List, Ranges); - // Finalize the entry by lowering it into a DWARF bytestream. - for (auto &Entry : LocList.List) - Entry.finalize(*Asm, TypeIdentifierMap); } // Collect info for variables that were optimized out. @@ -1622,27 +1600,62 @@ void DwarfDebug::emitDebugStr() { Holder.emitStrings(Asm->getObjFileLowering().getDwarfStrSection()); } +/// Emits an optimal (=sorted) sequence of DW_OP_pieces. +void DwarfDebug::emitLocPieces(ByteStreamer &Streamer, + const DITypeIdentifierMap &Map, + ArrayRef Values) { + assert(std::all_of(Values.begin(), Values.end(), [](DebugLocEntry::Value P) { + return P.isBitPiece(); + }) && "all values are expected to be pieces"); + assert(std::is_sorted(Values.begin(), Values.end()) && + "pieces are expected to be sorted"); + + unsigned Offset = 0; + for (auto Piece : Values) { + DIExpression Expr = Piece.getExpression(); + unsigned PieceOffset = Expr.getBitPieceOffset(); + unsigned PieceSize = Expr.getBitPieceSize(); + assert(Offset <= PieceOffset && "overlapping or duplicate pieces"); + if (Offset < PieceOffset) { + // The DWARF spec seriously mandates pieces with no locations for gaps. + Asm->EmitDwarfOpPiece(Streamer, PieceOffset-Offset); + Offset += PieceOffset-Offset; + } + Offset += PieceSize; + +#ifndef NDEBUG + DIVariable Var = Piece.getVariable(); + unsigned VarSize = Var.getSizeInBits(Map); + assert(PieceSize+PieceOffset <= VarSize + && "piece is larger than or outside of variable"); + assert(PieceSize != VarSize + && "piece covers entire variable"); +#endif + emitDebugLocValue(Streamer, Piece, PieceOffset); + } +} + void DwarfDebug::emitDebugLocEntry(ByteStreamer &Streamer, const DebugLocEntry &Entry) { - auto Comment = Entry.getComments().begin(); - auto End = Entry.getComments().end(); - for (uint8_t Byte : Entry.getDWARFBytes()) - Streamer.EmitInt8(Byte, Comment != End ? *(Comment++) : ""); + const DebugLocEntry::Value Value = Entry.getValues()[0]; + if (Value.isBitPiece()) + // Emit all pieces that belong to the same variable and range. + return emitLocPieces(Streamer, TypeIdentifierMap, Entry.getValues()); + + assert(Entry.getValues().size() == 1 && "only pieces may have >1 value"); + emitDebugLocValue(Streamer, Value); } -static void emitDebugLocValue(const AsmPrinter &AP, - const DITypeIdentifierMap &TypeIdentifierMap, - ByteStreamer &Streamer, - const DebugLocEntry::Value &Value, - unsigned PieceOffsetInBits) { +void DwarfDebug::emitDebugLocValue(ByteStreamer &Streamer, + const DebugLocEntry::Value &Value, + unsigned PieceOffsetInBits) { DIVariable DV = Value.getVariable(); - DebugLocDwarfExpression DwarfExpr( - *AP.TM.getSubtargetImpl()->getRegisterInfo(), - AP.getDwarfDebug()->getDwarfVersion(), Streamer); + DebugLocDwarfExpression DwarfExpr(*Asm, Streamer); + // Regular entry. if (Value.isInt()) { - DIBasicType BTy(DV.getType().resolve(TypeIdentifierMap)); + DIBasicType BTy(resolve(DV.getType())); if (BTy.Verify() && (BTy.getEncoding() == dwarf::DW_ATE_signed || BTy.getEncoding() == dwarf::DW_ATE_signed_char)) DwarfExpr.AddSignedConstant(Value.getInt()); @@ -1653,7 +1666,7 @@ static void emitDebugLocValue(const AsmPrinter &AP, DIExpression Expr = Value.getExpression(); if (!Expr || (Expr.getNumElements() == 0)) // Regular entry. - AP.EmitDwarfRegOp(Streamer, Loc); + Asm->EmitDwarfRegOp(Streamer, Loc); else { // Complex address entry. if (Loc.getOffset()) { @@ -1669,52 +1682,6 @@ static void emitDebugLocValue(const AsmPrinter &AP, // FIXME: ^ } - -void DebugLocEntry::finalize(const AsmPrinter &AP, - const DITypeIdentifierMap &TypeIdentifierMap) { - BufferByteStreamer Streamer(DWARFBytes, Comments); - const DebugLocEntry::Value Value = Values[0]; - if (Value.isBitPiece()) { - // Emit all pieces that belong to the same variable and range. - assert(std::all_of(Values.begin(), Values.end(), [](DebugLocEntry::Value P) { - return P.isBitPiece(); - }) && "all values are expected to be pieces"); - assert(std::is_sorted(Values.begin(), Values.end()) && - "pieces are expected to be sorted"); - - unsigned Offset = 0; - for (auto Piece : Values) { - DIExpression Expr = Piece.getExpression(); - unsigned PieceOffset = Expr.getBitPieceOffset(); - unsigned PieceSize = Expr.getBitPieceSize(); - assert(Offset <= PieceOffset && "overlapping or duplicate pieces"); - if (Offset < PieceOffset) { - // The DWARF spec seriously mandates pieces with no locations for gaps. - DebugLocDwarfExpression Expr( - *AP.TM.getSubtargetImpl()->getRegisterInfo(), - AP.getDwarfDebug()->getDwarfVersion(), Streamer); - Expr.AddOpPiece(PieceOffset-Offset, 0); - Offset += PieceOffset-Offset; - } - Offset += PieceSize; - -#ifndef NDEBUG - DIVariable Var = Piece.getVariable(); - unsigned VarSize = Var.getSizeInBits(TypeIdentifierMap); - assert(PieceSize+PieceOffset <= VarSize - && "piece is larger than or outside of variable"); - assert(PieceSize != VarSize - && "piece covers entire variable"); -#endif - emitDebugLocValue(AP, TypeIdentifierMap, Streamer, Piece, PieceOffset); - } - } else { - assert(Values.size() == 1 && "only pieces may have >1 value"); - emitDebugLocValue(AP, TypeIdentifierMap, Streamer, Value, 0); - } -} - - void DwarfDebug::emitDebugLocEntryLocation(const DebugLocEntry &Entry) { Asm->OutStreamer.AddComment("Loc expr size"); MCSymbol *begin = Asm->OutStreamer.getContext().CreateTempSymbol(); diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h index 1fa56f5..1c0e163 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h @@ -577,8 +577,7 @@ public: /// \brief Emit an entry for the debug loc section. This can be used to /// handle an entry that's going to be emitted into the debug loc section. - void emitDebugLocEntry(ByteStreamer &Streamer, - const DebugLocEntry &Entry); + void emitDebugLocEntry(ByteStreamer &Streamer, const DebugLocEntry &Entry); /// \brief emit a single value for the debug loc section. void emitDebugLocValue(ByteStreamer &Streamer, const DebugLocEntry::Value &Value, diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp index eae42da..fcab067 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp @@ -22,6 +22,14 @@ using namespace llvm; +const TargetRegisterInfo *DwarfExpression::getTRI() const { + return AP.TM.getSubtargetImpl()->getRegisterInfo(); +} + +unsigned DwarfExpression::getDwarfVersion() const { + return AP.getDwarfDebug()->getDwarfVersion(); +} + void DwarfExpression::AddReg(int DwarfReg, const char *Comment) { assert(DwarfReg >= 0 && "invalid negative dwarf register number"); if (DwarfReg < 32) { @@ -66,7 +74,7 @@ void DwarfExpression::AddShr(unsigned ShiftBy) { } bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) { - int DwarfReg = TRI.getDwarfRegNum(MachineReg, false); + int DwarfReg = getTRI()->getDwarfRegNum(MachineReg, false); if (DwarfReg < 0) return false; @@ -83,10 +91,11 @@ bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) { bool DwarfExpression::AddMachineRegPiece(unsigned MachineReg, unsigned PieceSizeInBits, unsigned PieceOffsetInBits) { - if (!TRI.isPhysicalRegister(MachineReg)) + const TargetRegisterInfo *TRI = getTRI(); + if (!TRI->isPhysicalRegister(MachineReg)) return false; - int Reg = TRI.getDwarfRegNum(MachineReg, false); + int Reg = TRI->getDwarfRegNum(MachineReg, false); // If this is a valid register number, emit it. if (Reg >= 0) { @@ -98,12 +107,12 @@ bool DwarfExpression::AddMachineRegPiece(unsigned MachineReg, // Walk up the super-register chain until we find a valid number. // For example, EAX on x86_64 is a 32-bit piece of RAX with offset 0. - for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { - Reg = TRI.getDwarfRegNum(*SR, false); + for (MCSuperRegIterator SR(MachineReg, TRI); SR.isValid(); ++SR) { + Reg = TRI->getDwarfRegNum(*SR, false); if (Reg >= 0) { - unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg); - unsigned Size = TRI.getSubRegIdxSize(Idx); - unsigned RegOffset = TRI.getSubRegIdxOffset(Idx); + unsigned Idx = TRI->getSubRegIndex(*SR, MachineReg); + unsigned Size = TRI->getSubRegIdxSize(Idx); + unsigned RegOffset = TRI->getSubRegIdxOffset(Idx); AddReg(Reg, "super-register"); if (PieceOffsetInBits == RegOffset) { AddOpPiece(Size, RegOffset); @@ -127,15 +136,15 @@ bool DwarfExpression::AddMachineRegPiece(unsigned MachineReg, // efficient DW_OP_piece. unsigned CurPos = PieceOffsetInBits; // The size of the register in bits, assuming 8 bits per byte. - unsigned RegSize = TRI.getMinimalPhysRegClass(MachineReg)->getSize() * 8; + unsigned RegSize = TRI->getMinimalPhysRegClass(MachineReg)->getSize() * 8; // Keep track of the bits in the register we already emitted, so we // can avoid emitting redundant aliasing subregs. SmallBitVector Coverage(RegSize, false); - for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { - unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR); - unsigned Size = TRI.getSubRegIdxSize(Idx); - unsigned Offset = TRI.getSubRegIdxOffset(Idx); - Reg = TRI.getDwarfRegNum(*SR, false); + for (MCSubRegIterator SR(MachineReg, TRI); SR.isValid(); ++SR) { + unsigned Idx = TRI->getSubRegIndex(MachineReg, *SR); + unsigned Size = TRI->getSubRegIdxSize(Idx); + unsigned Offset = TRI->getSubRegIdxOffset(Idx); + Reg = TRI->getDwarfRegNum(*SR, false); // Intersection between the bits we already emitted and the bits // covered by this subregister. @@ -171,7 +180,7 @@ void DwarfExpression::AddSignedConstant(int Value) { // value, so the producers and consumers started to rely on heuristics // to disambiguate the value vs. location status of the expression. // See PR21176 for more details. - if (DwarfVersion >= 4) + if (getDwarfVersion() >= 4) EmitOp(dwarf::DW_OP_stack_value); } @@ -179,7 +188,7 @@ void DwarfExpression::AddUnsignedConstant(unsigned Value) { EmitOp(dwarf::DW_OP_constu); EmitUnsigned(Value); // cf. comment in DwarfExpression::AddSignedConstant(). - if (DwarfVersion >= 4) + if (getDwarfVersion() >= 4) EmitOp(dwarf::DW_OP_stack_value); } diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h index 1409eaa..b90b7b6 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h @@ -30,14 +30,13 @@ class DIELoc; /// entry. class DwarfExpression { protected: + const AsmPrinter &AP; // Various convenience accessors that extract things out of AsmPrinter. - const TargetRegisterInfo &TRI; - unsigned DwarfVersion; + const TargetRegisterInfo *getTRI() const; + unsigned getDwarfVersion() const; public: - DwarfExpression(const TargetRegisterInfo &TRI, - unsigned DwarfVersion) - : TRI(TRI), DwarfVersion(DwarfVersion) {} + DwarfExpression(const AsmPrinter &AP) : AP(AP) {} virtual ~DwarfExpression() {} /// Output a dwarf operand and an optional assembler comment. @@ -106,9 +105,8 @@ class DebugLocDwarfExpression : public DwarfExpression { ByteStreamer &BS; public: - DebugLocDwarfExpression(const TargetRegisterInfo &TRI, - unsigned DwarfVersion, ByteStreamer &BS) - : DwarfExpression(TRI, DwarfVersion), BS(BS) {} + DebugLocDwarfExpression(const AsmPrinter &AP, ByteStreamer &BS) + : DwarfExpression(AP), BS(BS) {} void EmitOp(uint8_t Op, const char *Comment = nullptr) override; void EmitSigned(int Value) override; @@ -118,12 +116,13 @@ public: /// DwarfExpression implementation for singular DW_AT_location. class DIEDwarfExpression : public DwarfExpression { -const AsmPrinter &AP; DwarfUnit &DU; DIELoc &DIE; public: - DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE); + DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE) + : DwarfExpression(AP), DU(DU), DIE(DIE) {} + void EmitOp(uint8_t Op, const char *Comment = nullptr) override; void EmitSigned(int Value) override; void EmitUnsigned(unsigned Value) override; diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp index 56e8f11..b0c7d48 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp @@ -43,12 +43,6 @@ GenerateDwarfTypeUnits("generate-type-units", cl::Hidden, cl::desc("Generate DWARF4 type units."), cl::init(false)); -DIEDwarfExpression::DIEDwarfExpression(const AsmPrinter &AP, - DwarfUnit &DU, DIELoc &DIE) - : DwarfExpression(*AP.TM.getSubtargetImpl()->getRegisterInfo(), - AP.getDwarfDebug()->getDwarfVersion()), - AP(AP), DU(DU), DIE(DIE) {} - void DIEDwarfExpression::EmitOp(uint8_t Op, const char* Comment) { DU.addUInt(DIE, dwarf::DW_FORM_data1, Op); } @@ -59,7 +53,7 @@ void DIEDwarfExpression::EmitUnsigned(unsigned Value) { DU.addUInt(DIE, dwarf::DW_FORM_udata, Value); } bool DIEDwarfExpression::isFrameRegister(unsigned MachineReg) { - return MachineReg == TRI.getFrameRegister(*AP.MF); + return MachineReg == getTRI()->getFrameRegister(*AP.MF); } diff --git a/llvm/test/CodeGen/ARM/debug-info-qreg.ll b/llvm/test/CodeGen/ARM/debug-info-qreg.ll index 75cdd57..c05df6a 100644 --- a/llvm/test/CodeGen/ARM/debug-info-qreg.ll +++ b/llvm/test/CodeGen/ARM/debug-info-qreg.ll @@ -3,13 +3,13 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32- target triple = "thumbv7-apple-macosx10.6.7" ;CHECK: sub-register DW_OP_regx -;CHECK-NEXT: 256 +;CHECK-NEXT: ascii ;CHECK-NEXT: DW_OP_piece -;CHECK-NEXT: 8 +;CHECK-NEXT: byte 8 ;CHECK-NEXT: sub-register DW_OP_regx -;CHECK-NEXT: 257 +;CHECK-NEXT: ascii ;CHECK-NEXT: DW_OP_piece -;CHECK-NEXT: 8 +;CHECK-NEXT: byte 8 @.str = external constant [13 x i8] diff --git a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll index 5aa2ca9..f4b62f4 100644 --- a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll +++ b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll @@ -2,7 +2,7 @@ ; Radar 9309221 ; Test dwarf reg no for s16 ;CHECK: super-register DW_OP_regx -;CHECK-NEXT: 264 +;CHECK-NEXT: ascii ;CHECK-NEXT: DW_OP_piece ;CHECK-NEXT: 4 -- 2.7.4