From 963518c12431b6b114401a3ac763d10037b7d1e0 Mon Sep 17 00:00:00 2001 From: David Lu Date: Tue, 24 Mar 2020 15:57:34 +0800 Subject: [PATCH] drm/panel: support for boe,tv105wum-nw0 dsi video mode panel Add entries for BOE TV105WUM-NW0 10.5" WUXGA TFT LCD panel. Signed-off-by: David Lu Reviewed-by: Nicolas Boichat Signed-off-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20200324075734.1802-1-david.lu@bitland.com.cn --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 31 ++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index 48a1642..f89861c 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -696,6 +696,34 @@ static const struct panel_desc auo_b101uan08_3_desc = { .init_cmds = auo_b101uan08_3_init_cmd, }; +static const struct drm_display_mode boe_tv105wum_nw0_default_mode = { + .clock = 159260, + .hdisplay = 1200, + .hsync_start = 1200 + 80, + .hsync_end = 1200 + 80 + 24, + .htotal = 1200 + 80 + 24 + 60, + .vdisplay = 1920, + .vsync_start = 1920 + 10, + .vsync_end = 1920 + 10 + 2, + .vtotal = 1920 + 10 + 2 + 14, + .vrefresh = 60, + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct panel_desc boe_tv105wum_nw0_desc = { + .modes = &boe_tv105wum_nw0_default_mode, + .bpc = 8, + .size = { + .width_mm = 141, + .height_mm = 226, + }, + .lanes = 4, + .format = MIPI_DSI_FMT_RGB888, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_MODE_LPM, + .init_cmds = boe_init_cmd, +}; + static int boe_panel_get_modes(struct drm_panel *panel, struct drm_connector *connector) { @@ -834,6 +862,9 @@ static const struct of_device_id boe_of_match[] = { { .compatible = "auo,b101uan08.3", .data = &auo_b101uan08_3_desc }, + { .compatible = "boe,tv105wum-nw0", + .data = &boe_tv105wum_nw0_desc + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, boe_of_match); -- 2.7.4