From 959c8bf51cbb9298ca2e07fad913c26a5504211b Mon Sep 17 00:00:00 2001 From: Daniel Cederman Date: Wed, 18 Jul 2018 10:05:30 +0000 Subject: [PATCH] Revert "[Sparc] Use the IntPair reg class for r constraints with value type f64" This reverts commit 55222c9183c6e07f53a54c4061677734f54feac1. I missed that this patch has a dependency on https://reviews.llvm.org/D49219 that has not been approved yet. llvm-svn: 337373 --- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 2 +- llvm/test/CodeGen/SPARC/inlineasm.ll | 9 --------- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp index 178bb53..b04c6b1 100644 --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -3489,7 +3489,7 @@ SparcTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, if (Constraint.size() == 1) { switch (Constraint[0]) { case 'r': - if (VT == MVT::v2i32 || VT == MVT::f64) + if (VT == MVT::v2i32) return std::make_pair(0U, &SP::IntPairRegClass); else return std::make_pair(0U, &SP::IntRegsRegClass); diff --git a/llvm/test/CodeGen/SPARC/inlineasm.ll b/llvm/test/CodeGen/SPARC/inlineasm.ll index 12445ea9..a67a45e 100644 --- a/llvm/test/CodeGen/SPARC/inlineasm.ll +++ b/llvm/test/CodeGen/SPARC/inlineasm.ll @@ -130,12 +130,3 @@ entry: tail call void asm sideeffect "faddd $0,$1,$2", "{f20},{f20},{f20}"(double 9.0, double 10.0, double 11.0) ret void } - -; CHECK-LABEL: test_constraint_r_f64: -; CHECK: std %o0, [%sp+96] -; CHECK: ldd [%sp+96], %f0 -define double @test_constraint_r_f64() { -entry: - %0 = call double asm sideeffect "", "=r"() - ret double %0 -} -- 2.7.4