From 957d7644aa47478024315a20a31a91b32d3e65d6 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Thu, 22 Jun 2023 10:46:22 -0700 Subject: [PATCH] intel/ds: Track CCS cache flush bit Signed-off-by: Sagar Ghuge Reviewed-by: Lionel Landwerlin Part-of: --- src/gallium/drivers/iris/iris_utrace.c | 1 + src/intel/ds/intel_driver_ds.cc | 3 ++- src/intel/ds/intel_driver_ds.h | 1 + src/intel/ds/intel_tracepoints.py | 3 ++- src/intel/vulkan/anv_utrace.c | 1 + 5 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/iris/iris_utrace.c b/src/gallium/drivers/iris/iris_utrace.c index 44f1d23..d9f2fbd 100644 --- a/src/gallium/drivers/iris/iris_utrace.c +++ b/src/gallium/drivers/iris/iris_utrace.c @@ -228,6 +228,7 @@ iris_utrace_pipe_flush_bit_to_ds_stall_flag(uint32_t flags) { .iris = PIPE_CONTROL_FLUSH_HDC, .ds = INTEL_DS_HDC_PIPELINE_FLUSH_BIT, }, { .iris = PIPE_CONTROL_STALL_AT_SCOREBOARD, .ds = INTEL_DS_STALL_AT_SCOREBOARD_BIT, }, { .iris = PIPE_CONTROL_UNTYPED_DATAPORT_CACHE_FLUSH, .ds = INTEL_DS_UNTYPED_DATAPORT_CACHE_FLUSH_BIT, }, + { .iris = PIPE_CONTROL_CCS_CACHE_FLUSH, .ds = INTEL_DS_CCS_CACHE_FLUSH_BIT, }, }; enum intel_ds_stall_flag ret = 0; diff --git a/src/intel/ds/intel_driver_ds.cc b/src/intel/ds/intel_driver_ds.cc index d252998..854130a 100644 --- a/src/intel/ds/intel_driver_ds.cc +++ b/src/intel/ds/intel_driver_ds.cc @@ -307,7 +307,7 @@ custom_trace_payload_as_extra_end_stall(perfetto::protos::pbzero::GpuRenderStage auto data = event->add_extra_data(); data->set_name("stall_reason"); - snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s : %s", + snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s : %s", (payload->flags & INTEL_DS_DEPTH_CACHE_FLUSH_BIT) ? "+depth_flush" : "", (payload->flags & INTEL_DS_DATA_CACHE_FLUSH_BIT) ? "+dc_flush" : "", (payload->flags & INTEL_DS_HDC_PIPELINE_FLUSH_BIT) ? "+hdc_flush" : "", @@ -324,6 +324,7 @@ custom_trace_payload_as_extra_end_stall(perfetto::protos::pbzero::GpuRenderStage (payload->flags & INTEL_DS_CS_STALL_BIT) ? "+cs_stall" : "", (payload->flags & INTEL_DS_UNTYPED_DATAPORT_CACHE_FLUSH_BIT) ? "+udp_flush" : "", (payload->flags & INTEL_DS_END_OF_PIPE_BIT) ? "+eop" : "", + (payload->flags & INTEL_DS_CCS_CACHE_FLUSH_BIT) ? "+ccs_flush" : "", payload->reason ? payload->reason : "unknown"); assert(strlen(buf) > 0); diff --git a/src/intel/ds/intel_driver_ds.h b/src/intel/ds/intel_driver_ds.h index 82b298d..507db2c 100644 --- a/src/intel/ds/intel_driver_ds.h +++ b/src/intel/ds/intel_driver_ds.h @@ -58,6 +58,7 @@ enum intel_ds_stall_flag { INTEL_DS_UNTYPED_DATAPORT_CACHE_FLUSH_BIT = BITFIELD_BIT(13), INTEL_DS_PSS_STALL_SYNC_BIT = BITFIELD_BIT(14), INTEL_DS_END_OF_PIPE_BIT = BITFIELD_BIT(15), + INTEL_DS_CCS_CACHE_FLUSH_BIT = BITFIELD_BIT(16), }; /* Convert internal driver PIPE_CONTROL stall bits to intel_ds_stall_flag. */ diff --git a/src/intel/ds/intel_tracepoints.py b/src/intel/ds/intel_tracepoints.py index 550db24..b11c789 100644 --- a/src/intel/ds/intel_tracepoints.py +++ b/src/intel/ds/intel_tracepoints.py @@ -210,7 +210,8 @@ def define_tracepoints(args): ['CS_STALL', 'cs_stall'], ['UNTYPED_DATAPORT_CACHE_FLUSH', 'udp_flush'], ['PSS_STALL_SYNC', 'pss_stall'], - ['END_OF_PIPE', 'eop']] + ['END_OF_PIPE', 'eop'], + ['CCS_CACHE_FLUSH', 'ccs_flush']] begin_end_tp('stall', tp_args=[ArgStruct(type='uint32_t', var='flags'), diff --git a/src/intel/vulkan/anv_utrace.c b/src/intel/vulkan/anv_utrace.c index 00957a9..d4c997b 100644 --- a/src/intel/vulkan/anv_utrace.c +++ b/src/intel/vulkan/anv_utrace.c @@ -398,6 +398,7 @@ anv_pipe_flush_bit_to_ds_stall_flag(enum anv_pipe_bits bits) { .anv = ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT, .ds = INTEL_DS_UNTYPED_DATAPORT_CACHE_FLUSH_BIT, }, { .anv = ANV_PIPE_PSS_STALL_SYNC_BIT, .ds = INTEL_DS_PSS_STALL_SYNC_BIT, }, { .anv = ANV_PIPE_END_OF_PIPE_SYNC_BIT, .ds = INTEL_DS_END_OF_PIPE_BIT, }, + { .anv = ANV_PIPE_CCS_CACHE_FLUSH_BIT, .ds = INTEL_DS_CCS_CACHE_FLUSH_BIT, }, }; enum intel_ds_stall_flag ret = 0; -- 2.7.4