From 9576e9fa1c02aea3cf1e42eadcbeb12ccf5e87de Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Thu, 23 Apr 2020 21:38:42 +0200 Subject: [PATCH] net: phy: clear phydev->suspended after soft reset If a soft reset is triggered whilst PHY is in power-down, then phydev->suspended will remain set. Seems we didn't face any issue yet caused by this, but better reset the suspended flag after soft reset. See also the following from 22.2.4.1.1 Resetting a PHY is accomplished by setting bit 0.15 to a logic one. This action shall set the status and control registers to their default states. Signed-off-by: Heiner Kallweit Signed-off-by: David S. Miller --- drivers/net/phy/phy_device.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index c8f8fd9..7e1ddd5 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -1082,8 +1082,12 @@ int phy_init_hw(struct phy_device *phydev) if (!phydev->drv) return 0; - if (phydev->drv->soft_reset) + if (phydev->drv->soft_reset) { ret = phydev->drv->soft_reset(phydev); + /* see comment in genphy_soft_reset for an explanation */ + if (!ret) + phydev->suspended = 0; + } if (ret < 0) return ret; @@ -2157,6 +2161,12 @@ int genphy_soft_reset(struct phy_device *phydev) if (ret < 0) return ret; + /* Clause 22 states that setting bit BMCR_RESET sets control registers + * to their default value. Therefore the POWER DOWN bit is supposed to + * be cleared after soft reset. + */ + phydev->suspended = 0; + ret = phy_poll_reset(phydev); if (ret) return ret; -- 2.7.4