From 956f7f2b4f785271f7fde2a6ff83472d9451968f Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Thu, 6 Oct 2022 13:05:13 +0200 Subject: [PATCH] [CodeGenCXX] Remove typed pointer check lines from test (NFC) This test already has check lines for opaque pointers, remove the unnecessary typed pointer check lines. --- clang/test/CodeGenCXX/threadlocal_address.cpp | 21 --------------------- 1 file changed, 21 deletions(-) diff --git a/clang/test/CodeGenCXX/threadlocal_address.cpp b/clang/test/CodeGenCXX/threadlocal_address.cpp index f5af5c2..cb63bc2 100644 --- a/clang/test/CodeGenCXX/threadlocal_address.cpp +++ b/clang/test/CodeGenCXX/threadlocal_address.cpp @@ -1,7 +1,6 @@ // Test that the use of thread local variables would be wrapped by @llvm.threadlocal.address intrinsics. // RUN: %clang_cc1 -std=c++11 -emit-llvm -triple x86_64 -o - %s -disable-llvm-passes | FileCheck %s // RUN: %clang_cc1 -std=c++11 -emit-llvm -triple aarch64 -o - -O1 %s | FileCheck %s -check-prefix=CHECK-O1 -// RUN: %clang_cc1 -std=c++11 -no-opaque-pointers -emit-llvm -triple x86_64 -o - %s -disable-llvm-passes | FileCheck %s -check-prefix=CHECK-NOOPAQUE thread_local int i; int g() { i++; @@ -29,16 +28,6 @@ int g() { // CHECK-O1-NEXT: %[[INC:.+]] = add nsw i32 %[[VAL]], 1 // CHECK-O1-NEXT: store i32 %[[INC]], ptr %[[I_ADDR]] // CHECK-O1-NEXT: ret i32 %[[INC]] -// -// CHECK-NOOPAQUE-LABEL: @_Z1gv -// CHECK-NOOPAQUE-NEXT: entry: -// CHECK-NOOPAQUE-NEXT: %[[I_ADDR:.+]] = call align 4 i32* @llvm.threadlocal.address.p0i32(i32* align 4 @i) -// CHECK-NOOPAQUE-NEXT: %[[VAL:.+]] = load i32, i32* %[[I_ADDR]] -// CHECK-NOOPAQUE-NEXT: %[[INC:.+]] = add nsw i32 %[[VAL]], 1 -// CHECK-NOOPAQUE-NEXT: store i32 %[[INC]], i32* %[[I_ADDR]] -// CHECK-NOOPAQUE-NEXT: %[[IA2:.+]] = call align 4 i32* @llvm.threadlocal.address.p0i32(i32* align 4 @i) -// CHECK-NOOPAQUE-NEXT: %[[RET:.+]] = load i32, i32* %[[IA2]], align 4 -// CHECK-NOOPAQUE-NEXT: ret i32 %[[RET]] int f() { thread_local int j = 0; j++; @@ -62,14 +51,4 @@ int f() { // CHECK-O1-NEXT: store i32 %[[INC]], ptr %[[J_ADDR]] // CHECK-O1-NEXT: ret i32 %[[INC]] // -// CHECK-NOOPAQUE: @_Z1fv() -// CHECK-NOOPAQUE-NEXT: entry -// CHECK-NOOPAQUE-NEXT: %[[JA:.+]] = call align 4 i32* @llvm.threadlocal.address.p0i32(i32* align 4 @_ZZ1fvE1j) -// CHECK-NOOPAQUE-NEXT: %[[VA:.+]] = load i32, i32* %[[JA]] -// CHECK-NOOPAQUE-NEXT: %[[INC:.+]] = add nsw i32 %[[VA]], 1 -// CHECK-NOOPAQUE-NEXT: store i32 %[[INC]], i32* %[[JA]], align 4 -// CHECK-NOOPAQUE-NEXT: %[[JA2:.+]] = call align 4 i32* @llvm.threadlocal.address.p0i32(i32* align 4 @_ZZ1fvE1j) -// CHECK-NOOPAQUE-NEXT: %[[RET:.+]] = load i32, i32* %[[JA2]], align 4 -// CHECK-NOOPAQUE-NEXT: ret i32 %[[RET]] -// // CHECK: attributes #[[ATTR_NUM]] = { nocallback nofree nosync nounwind readnone speculatable willreturn } -- 2.7.4