From 955c1dd15d3b044c736a4f9353e04c1c23d02d0c Mon Sep 17 00:00:00 2001 From: Jani Nikula Date: Wed, 16 Nov 2016 12:13:59 +0200 Subject: [PATCH] drm/i915/gvt: drop checks for early Skylake revisions We no longer cater for pre-production revisions of Skylake. Fixes: d4362225e8cb ("drm/i915/gvt: update misc ctl regs base on stepping info") Cc: Ping Gao Cc: Zhenyu Wang Cc: Zhi Wang Cc: Signed-off-by: Jani Nikula Reviewed-by: Paulo Zanoni Signed-off-by: Zhenyu Wang --- drivers/gpu/drm/i915/gvt/handlers.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 79ee833..5228097 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -1279,14 +1279,12 @@ static int skl_misc_ctl_write(struct intel_vgpu *vgpu, unsigned int offset, case 0x4ddc: vgpu_vreg(vgpu, offset) = 0x8000003c; /* WaCompressedResourceSamplerPbeMediaNewHashMode:skl */ - if (IS_SKL_REVID(dev_priv, SKL_REVID_C0, REVID_FOREVER)) - I915_WRITE(reg, vgpu_vreg(vgpu, offset)); + I915_WRITE(reg, vgpu_vreg(vgpu, offset)); break; case 0x42080: vgpu_vreg(vgpu, offset) = 0x8000; /* WaCompressedResourceDisplayNewHashMode:skl */ - if (IS_SKL_REVID(dev_priv, SKL_REVID_E0, REVID_FOREVER)) - I915_WRITE(reg, vgpu_vreg(vgpu, offset)); + I915_WRITE(reg, vgpu_vreg(vgpu, offset)); break; default: return -EINVAL; -- 2.7.4