From 949018cc279c42640ea4531dfe132e15c9d97938 Mon Sep 17 00:00:00 2001 From: Chen Zheng Date: Tue, 28 Apr 2020 04:28:23 -0400 Subject: [PATCH] [PowerPC] add test case for reorder operands of qpx fma instr - nfc. --- llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll diff --git a/llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll b/llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll new file mode 100644 index 0000000..9ce295f --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll @@ -0,0 +1,19 @@ +; RUN: llc -verify-machineinstrs -stop-after=finalize-isel < %s -mcpu=a2q | FileCheck %s + +define <2 x double> @test_qvfmadd(<2 x double> %0, <2 x double> %1, <2 x double> %2) { +; CHECK: test_qvfmadd +; CHECK: QVFMADD %2, %0, %1, implicit $rm +; + %4 = fmul reassoc nsz <2 x double> %2, %1 + %5 = fadd reassoc nsz <2 x double> %4, %0 + ret <2 x double> %5 +} + +define <4 x float> @test_qvfmadds(<4 x float> %0, <4 x float> %1, <4 x float> %2) { +; CHECK: test_qvfmadds +; CHECK: QVFMADDSs %2, %0, %1, implicit $rm +; + %4 = fmul reassoc nsz <4 x float> %2, %1 + %5 = fadd reassoc nsz <4 x float> %4, %0 + ret <4 x float> %5 +} -- 2.7.4