From 94891ddf0d633c3c31819c26c034659aea11210f Mon Sep 17 00:00:00 2001 From: Pete Cooper Date: Thu, 7 Aug 2014 05:47:10 +0000 Subject: [PATCH] Update BitRecTy::convertValue to allow if expressions with bit values on both sides of the if llvm-svn: 215087 --- llvm/lib/TableGen/Record.cpp | 10 ++++++++++ llvm/test/TableGen/ifbit.td | 2 ++ 2 files changed, 12 insertions(+) diff --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp index 8267a36..cb21be7 100644 --- a/llvm/lib/TableGen/Record.cpp +++ b/llvm/lib/TableGen/Record.cpp @@ -119,6 +119,16 @@ Init *BitRecTy::convertValue(TypedInit *VI) { if (auto *BitsTy = dyn_cast(Ty)) // Accept only bits<1> expression. return BitsTy->getNumBits() == 1 ? VI : nullptr; + // Ternary !if can be converted to bit, but only if both sides are + // convertible to a bit. + if (TernOpInit *TOI = dyn_cast(VI)) { + if (TOI->getOpcode() != TernOpInit::TernaryOp::IF) + return nullptr; + if (!TOI->getMHS()->convertInitializerTo(BitRecTy::get()) || + !TOI->getRHS()->convertInitializerTo(BitRecTy::get())) + return nullptr; + return TOI; + } return nullptr; } diff --git a/llvm/test/TableGen/ifbit.td b/llvm/test/TableGen/ifbit.td index 88f575e..18797ca 100644 --- a/llvm/test/TableGen/ifbit.td +++ b/llvm/test/TableGen/ifbit.td @@ -5,6 +5,8 @@ class A { int a = !if(b, 5, 6); + bit c = !if(b, 0, 1); + bits<1> d = !if(b, 0, 1); } def X : A<0>; -- 2.7.4