From 9454fee46092a368bd4cb015481964d017a33cac Mon Sep 17 00:00:00 2001 From: Ashish Kumar Date: Thu, 18 Jul 2019 16:43:15 +0530 Subject: [PATCH] mtd: spi: Add micron mt35xu512aba and mt35xu02g flash ID mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O also enable use of SPI_NOR_4B_OPCODES. These flashes are tested on LX2160ARDB and LS1028ARDB respectively Signed-off-by: Kuldeep Singh Signed-off-by: Ashish Kumar [jagan: suffix 'ba' on part name and update commit message] Signed-off-by: Jagan Teki Reviewed-by: Jagan Teki --- drivers/mtd/spi/spi-nor-ids.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index d99c4c5..a3920ba 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -170,6 +170,8 @@ const struct flash_info spi_nor_ids[] = { { INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, + { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_4B_OPCODES) }, + { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ /* Spansion/Cypress -- single (large) sector size only, at least -- 2.7.4