From 9444d71611b97a1f3102ba60b94ce1860a9961e9 Mon Sep 17 00:00:00 2001 From: Ilia Mirkin Date: Sun, 29 May 2016 22:15:07 -0400 Subject: [PATCH] nvc0: fix some compute texture validation bits on kepler (a) Make sure to update the TIC in case of an updated buffer address (b) Mark newly-inactive textures dirty so that we update the handle in set_tex_handles. Signed-off-by: Ilia Mirkin Reviewed-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 2 ++ src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 2 +- src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 5 ++++- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h index c099758..5e4ed3d 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h @@ -333,6 +333,8 @@ void nve4_set_tex_handles(struct nvc0_context *); void nvc0_validate_surfaces(struct nvc0_context *); void nve4_set_surface_info(struct nouveau_pushbuf *, struct pipe_image_view *, struct nvc0_context *); +void nvc0_update_tic(struct nvc0_context *, struct nv50_tic_entry *, + struct nv04_resource *); struct pipe_sampler_view * nvc0_create_texture_view(struct pipe_context *, diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c index d36cea7..ab0e337 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c @@ -413,7 +413,7 @@ nvc0_create_texture_view(struct pipe_context *pipe, return gf100_create_texture_view(pipe, texture, templ, flags, target); } -static void +void nvc0_update_tic(struct nvc0_context *nvc0, struct nv50_tic_entry *tic, struct nv04_resource *res) { diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c index 2e3554d..7202153 100644 --- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c +++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c @@ -632,6 +632,7 @@ nve4_compute_validate_textures(struct nvc0_context *nvc0) continue; } res = nv04_resource(tic->pipe.texture); + nvc0_update_tic(nvc0, tic, res); if (tic->id < 0) { tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic); @@ -662,8 +663,10 @@ nve4_compute_validate_textures(struct nvc0_context *nvc0) if (dirty) BCTX_REFN(nvc0->bufctx_cp, CP_TEX(i), res, RD); } - for (; i < nvc0->state.num_textures[s]; ++i) + for (; i < nvc0->state.num_textures[s]; ++i) { nvc0->tex_handles[s][i] |= NVE4_TIC_ENTRY_INVALID; + nvc0->textures_dirty[s] |= 1 << i; + } if (n[0]) { BEGIN_NIC0(push, NVE4_CP(TIC_FLUSH), n[0]); -- 2.7.4