From 9435283319481d62de86dbf676d0724aadb59bae Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 26 May 2008 12:03:55 -0700 Subject: [PATCH] ndisasm: the high bit of is4 bytes is ignored in 32-bit mode Mask the high bit of is4 bytes in 32-bit mode. Provide a generic "regmask" variable that we can use for equivalent purposes as needed. --- disasm.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/disasm.c b/disasm.c index 77b87b0..c02a3ad 100644 --- a/disasm.c +++ b/disasm.c @@ -377,6 +377,7 @@ static int matches(const struct itemplate *t, uint8_t *data, struct operand *opx; int s_field_for = -1; /* No 144/154 series code encountered */ bool vex_ok = false; + int regmask = (segsize == 64) ? 15 : 7; for (i = 0; i < MAX_OPERANDS; i++) { ins->oprs[i].segment = ins->oprs[i].disp_size = @@ -642,7 +643,7 @@ static int matches(const struct itemplate *t, uint8_t *data, { uint8_t ximm = *data++; c = *r++; - ins->oprs[c >> 3].basereg = ximm >> 4; + ins->oprs[c >> 3].basereg = (ximm >> 4) & regmask; ins->oprs[c >> 3].segment |= SEG_RMREG; ins->oprs[c & 7].offset = ximm & 15; } @@ -656,7 +657,7 @@ static int matches(const struct itemplate *t, uint8_t *data, if ((c ^ ximm) & 15) return false; - ins->oprs[c >> 4].basereg = ximm >> 4; + ins->oprs[c >> 4].basereg = (ximm >> 4) & regmask; ins->oprs[c >> 4].segment |= SEG_RMREG; } break; @@ -666,7 +667,7 @@ static int matches(const struct itemplate *t, uint8_t *data, uint8_t ximm = *data++; c = *r++; - ins->oprs[c].basereg = ximm >> 4; + ins->oprs[c].basereg = (ximm >> 4) & regmask; ins->oprs[c].segment |= SEG_RMREG; } break; -- 2.7.4