From 94272611ac9fcebc5ec87e3cb866fcecc4fb7ea2 Mon Sep 17 00:00:00 2001 From: Colin LeMahieu Date: Wed, 31 Dec 2014 15:57:38 +0000 Subject: [PATCH] [Hexagon] Changing an llvm_unreachable to an assertion and returning 0. Relocations aren't implemented yet but we don't need to abort for this in release builds. llvm-svn: 225043 --- llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp index 4471977..830be55 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp @@ -71,7 +71,8 @@ HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, return MCT.getRegisterInfo()->getEncodingValue(MO.getReg()); if (MO.isImm()) return static_cast(MO.getImm()); - llvm_unreachable("Only Immediates and Registers implemented right now"); + assert(false && "Only Immediates and Registers implemented right now"); + return 0; } MCSubtargetInfo const &HexagonMCCodeEmitter::getSubtargetInfo() const { -- 2.7.4