From 93dbdde31327d7ddb8162d2274d04a56dc23f404 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sat, 10 Jun 2023 18:04:17 -0400 Subject: [PATCH] amd: fix GPU cache sizes retrieved from the kernel Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/amd/common/ac_gpu_info.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index a27a496..1f3a38d 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -1002,15 +1002,15 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info) info->tcc_rb_non_coherent = !util_is_power_of_two_or_zero(info->num_tcc_blocks); if (info->drm_minor >= 52) { - info->sqc_inst_cache_size = device_info.sqc_inst_cache_size; - info->sqc_scalar_cache_size = device_info.sqc_data_cache_size; + info->sqc_inst_cache_size = device_info.sqc_inst_cache_size * 1024; + info->sqc_scalar_cache_size = device_info.sqc_data_cache_size * 1024; info->num_sqc_per_wgp = device_info.num_sqc_per_wgp; } if (info->gfx_level >= GFX11 && info->drm_minor >= 52) { - info->tcp_cache_size = device_info.tcp_cache_size; - info->l1_cache_size = device_info.gl1c_cache_size; - info->l2_cache_size = device_info.gl2c_cache_size; + info->tcp_cache_size = device_info.tcp_cache_size * 1024; + info->l1_cache_size = device_info.gl1c_cache_size * 1024; + info->l2_cache_size = device_info.gl2c_cache_size * 1024; info->l3_cache_size_mb = DIV_ROUND_UP(device_info.mall_size, 1024 * 1024); } else { if (info->gfx_level >= GFX11) { -- 2.7.4