From 93ad5eeb4a24be7e43287cb942f0063327f50aad Mon Sep 17 00:00:00 2001 From: yroux Date: Thu, 12 Jun 2014 09:05:08 +0000 Subject: [PATCH] Merge branches/gcc-4_9-branch rev 211054 git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@211495 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 438 ++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 56 + gcc/ada/gcc-interface/decl.c | 6 +- gcc/ada/gcc-interface/utils.c | 3 +- gcc/c-family/ChangeLog | 6 + gcc/c-family/c-opts.c | 6 + gcc/c/ChangeLog | 6 + gcc/c/c-array-notation.c | 2 + gcc/cgraph.h | 1 + gcc/config.in | 7 + gcc/config/aarch64/arm_neon.h | 4 +- gcc/config/alpha/alpha.c | 49 +- gcc/config/arm/aout.h | 9 +- gcc/config/arm/arm-cores.def | 9 +- gcc/config/arm/arm-opts.h | 9 +- gcc/config/arm/arm.c | 2 +- gcc/config/arm/arm.h | 9 +- gcc/config/arm/arm.md | 11 +- gcc/config/arm/bpabi.h | 9 +- gcc/config/arm/elf.h | 9 +- gcc/config/arm/linux-elf.h | 9 +- gcc/config/arm/linux-gas.h | 9 +- gcc/config/arm/netbsd-elf.h | 9 +- gcc/config/arm/uclinux-eabi.h | 9 +- gcc/config/arm/uclinux-elf.h | 9 +- gcc/config/arm/vxworks.h | 9 +- gcc/config/avr/avr-mcus.def | 2 +- gcc/config/avr/avr.c | 13 +- gcc/config/avr/avr.md | 8 +- gcc/config/dbx.h | 9 +- gcc/config/i386/i386.c | 21 +- gcc/config/i386/i386.md | 2 +- gcc/config/initfini-array.h | 9 +- gcc/config/msp430/msp430.c | 117 +- gcc/config/msp430/msp430.h | 4 +- gcc/config/msp430/msp430.md | 16 +- gcc/config/msp430/predicates.md | 4 + gcc/config/newlib-stdint.h | 9 +- gcc/config/rs6000/htm.md | 2 +- gcc/config/rs6000/htmxlintrin.h | 9 +- gcc/config/rs6000/rs6000-builtin.def | 4 +- gcc/config/rs6000/rs6000.c | 21 +- gcc/config/rs6000/rs6000.h | 7 +- gcc/config/rs6000/rs6000.md | 4 +- gcc/config/rtems.h | 9 +- gcc/config/sol2-clearcap.map | 2 + gcc/config/sol2-clearcapv2.map | 7 + gcc/config/sol2.h | 11 +- gcc/config/sol2.opt | 4 + gcc/config/sparc/sparc-protos.h | 1 - gcc/config/sparc/sparc.c | 16 - gcc/config/sparc/sparc.md | 291 ++-- gcc/config/t-sol2 | 7 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gcc/testsuite/ChangeLog | 190 +++ gcc/testsuite/c-c++-common/cilk-plus/AN/pr61191.c | 10 + .../c-c++-common/cilk-plus/CK/invalid_sync.cc | 9 + gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this18.C | 30 + gcc/testsuite/g++.dg/cpp0x/nsdmi-template10.C | 14 + gcc/testsuite/g++.dg/cpp0x/nsdmi-template9.C | 16 + gcc/testsuite/g++.dg/cpp0x/sfinae50.C | 41 + gcc/testsuite/g++.dg/init/copy7.C | 9 + gcc/testsuite/g++.dg/ipa/devirt-11.C | 2 +- gcc/testsuite/g++.dg/ipa/devirt-31.C | 23 + gcc/testsuite/g++.dg/ipa/pr61085.C | 33 + gcc/testsuite/g++.dg/pr60969.C | 32 + gcc/testsuite/g++.dg/torture/pr60854.C | 13 + gcc/testsuite/g++.dg/tree-ssa/pr61009.C | 53 + gcc/testsuite/gcc.dg/graphite/pr60979.c | 37 + gcc/testsuite/gcc.dg/pr61045.c | 12 + gcc/testsuite/gcc.dg/pr61060.c | 19 + gcc/testsuite/gcc.dg/pr61158.c | 12 + gcc/testsuite/gcc.dg/torture/pr57864.c | 37 + gcc/testsuite/gcc.dg/torture/pr61010.c | 8 + gcc/testsuite/gcc.dg/unused-8b.c | 4 + gcc/testsuite/gcc.dg/vect/vect.exp | 25 +- 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libbacktrace/mmap.c | 28 +- libgcc/ChangeLog | 30 + libgcc/config/arm/bpabi-lib.h | 4 + libgcc/config/arm/sfp-machine.h | 8 +- libgcc/config/msp430/t-msp430 | 2 +- libgcc/config/t-slibgcc-sld | 4 + libgfortran/ChangeLog | 25 + libgfortran/intrinsics/ctime.c | 70 +- libgfortran/io/list_read.c | 16 +- libgfortran/io/unix.c | 14 +- libgo/config.h.in | 3 + libgo/configure | 2 +- libgo/configure.ac | 2 +- libgo/mksysinfo.sh | 39 + libgo/runtime/proc.c | 3 +- libgomp/ChangeLog | 11 + libgomp/libgomp.texi | 84 +- libgomp/testsuite/libgomp.c++/simd-9.C | 52 + libitm/ChangeLog | 7 + libitm/acinclude.m4 | 10 +- libitm/clearcap.map | 14 - libitm/configure | 8 +- libstdc++-v3/ChangeLog | 75 + libstdc++-v3/doc/html/faq.html | 2 +- libstdc++-v3/doc/xml/faq.xml | 2 +- libstdc++-v3/include/bits/hashtable.h | 146 +- libstdc++-v3/include/bits/regex_automaton.tcc | 4 +- libstdc++-v3/include/bits/stl_iterator.h | 15 - libstdc++-v3/include/bits/stl_tree.h | 1 + libstdc++-v3/include/bits/stl_vector.h | 14 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gcc/config/sol2-clearcap.map create mode 100644 gcc/config/sol2-clearcapv2.map create mode 100644 gcc/testsuite/c-c++-common/cilk-plus/AN/pr61191.c create mode 100644 gcc/testsuite/c-c++-common/cilk-plus/CK/invalid_sync.cc create mode 100644 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this18.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/nsdmi-template10.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/nsdmi-template9.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/sfinae50.C create mode 100644 gcc/testsuite/g++.dg/init/copy7.C create mode 100644 gcc/testsuite/g++.dg/ipa/devirt-31.C create mode 100644 gcc/testsuite/g++.dg/ipa/pr61085.C create mode 100644 gcc/testsuite/g++.dg/pr60969.C create mode 100644 gcc/testsuite/g++.dg/torture/pr60854.C create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr61009.C create mode 100644 gcc/testsuite/gcc.dg/graphite/pr60979.c create mode 100644 gcc/testsuite/gcc.dg/pr61045.c create mode 100644 gcc/testsuite/gcc.dg/pr61060.c create mode 100644 gcc/testsuite/gcc.dg/pr61158.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr57864.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr61010.c create mode 100644 gcc/testsuite/gcc.dg/unused-8b.c create mode 100644 gcc/testsuite/gcc.target/avr/pr60991.c create mode 100644 gcc/testsuite/gcc.target/avr/torture/pr61055.c delete mode 100644 gcc/testsuite/gcc.target/i386/clearcap.map delete mode 100644 gcc/testsuite/gcc.target/i386/clearcapv2.map create mode 100644 gcc/testsuite/gcc.target/i386/pr60902.c create mode 100644 gcc/testsuite/gcc.target/powerpc/htm-ttest.c create mode 100644 gcc/testsuite/gfortran.dg/associate_16.f90 create mode 100644 gcc/testsuite/gfortran.dg/list_read_13.f create mode 100644 gcc/testsuite/gnat.dg/enum3.adb create mode 100644 gcc/testsuite/gnat.dg/overflow_fixed.adb create mode 100644 gcc/testsuite/lib/clearcap.exp create mode 100644 libgomp/testsuite/libgomp.c++/simd-9.C delete mode 100644 libitm/clearcap.map create mode 100644 libstdc++-v3/testsuite/20_util/function/60594.cc create mode 100644 libstdc++-v3/testsuite/23_containers/set/cons/61023.cc create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_set/61143.cc create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/swap.cc create mode 100644 libstdc++-v3/testsuite/30_threads/promise/60966.cc diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6ea494b..b3d8033 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,441 @@ +2014-05-29 Uros Bizjak + + Backport from mainline + 2014-05-26 Uros Bizjak + + PR target/61271 + * config/i386/i386.c (ix86_rtx_costs) + : + Fix condition. + +2014-05-28 Eric Botcazou + + Backport from mainline + 2014-05-27 Eric Botcazou + + * double-int.c (div_and_round_double) : Use the proper + predicate to detect a negative quotient. + +2014-05-28 Richard Biener + + Backport from mainline + 2014-05-28 Richard Biener + + PR middle-end/61045 + * fold-const.c (fold_comparison): When folding + X +- C1 CMP Y +- C2 to X CMP Y +- C2 +- C1 also ensure + the sign of the remaining constant operand stays the same. + + 2014-05-05 Richard Biener + + PR middle-end/61010 + * fold-const.c (fold_binary_loc): Consistently avoid + canonicalizing X & CST away from a CST that is the mask + of a mode. + + 2014-04-28 Richard Biener + + PR tree-optimization/60979 + * graphite-scop-detection.c (scopdet_basic_block_info): Reject + SCOPs that end in a block with a successor with abnormal + predecessors. + +2014-05-28 Rainer Orth + + * configure.ac ($gcc_cv_ld_clearcap): New test. + * configure: Regenerate. + * config.in: Regenerate. + * config/sol2.opt (mclear-hwcap): New option. + * config/sol2.h (LINK_CLEARCAP_SPEC): Define. + * config/sol2-clearcap.map: Moved here from + testsuite/gcc.target/i386/clearcap.map. + * config/sol2-clearcapv2.map: Move here from + gcc.target/i386/clearcapv2.map. + * config/t-sol2 (install): Depend on install-clearcap-map. + (install-clearcap-map): New target. + * doc/invoke.texi (Option Summary, Solaris 2 Options): Document + -mclear-hwcap. + +2014-05-28 Georg-Johann Lay + + PR libgcc/61152 + * config/dbx.h (License): Add Runtime Library Exception. + * config/newlib-stdint.h (License): Same. + * config/rtems.h (License): Same + * config/initfini-array.h (License): Same + * config/v850/v850.h (License): Same. + * config/v850/v850-opts.h (License): Same + * config/v850/rtems.h (License): Same. + +2014-05-28 Georg-Johann Lay + + PR target/61044 + * doc/extend.texi (Local Labels): Note that label differences are + not supported for AVR. + +2014-05-27 Georg-Johann Lay + + Backport from 2014-05-12 mainline r210322. + Backport from 2014-05-27 mainline r210959, r210969. + + PR libgcc/61152 + * config/arm/arm.h (License): Add GCC Runtime Library Exception. + * config/arm/arm-cores.def (License): Same. + * config/arm/arm-opts.h (License): Same. + * config/arm/aout.h (License): Same. + * config/arm/bpabi.h (License): Same. + * config/arm/elf.h (License): Same. + * config/arm/linux-elf.h (License): Same. + * config/arm/linux-gas.h (License): Same. + * config/arm/netbsd-elf.h (License): Same. + * config/arm/uclinux-eabi.h (License): Same. + * config/arm/uclinux-elf.h (License): Same. + * config/arm/vxworks.h (License): Same. + +2014-05-26 Michael Tautschnig + + PR target/61249 + * doc/extend.texi (X86 Built-in Functions): Fix parameter lists of + __builtin_ia32_vfrczs[sd] and __builtin_ia32_mpsadbw256. + +2014-05-22 Vladimir Makarov + + PR rtl-optimization/61215 + * lra-elelimination.c (lra_eliminate_regs_1): Don't use + simplify_gen_subreg until final substitution. + +2014-05-23 Alan Modra + + PR target/61231 + * config/rs6000/rs6000.c (mem_operand_gpr): Handle SImode. + * config/rs6000/rs6000.md (extendsidi2_lfiwax, extendsidi2_nocell): + Use "Y" constraint rather than "m". + +2014-05-22 Vladimir Makarov + + PR rtl-optimization/60969 + * ira-costs.c (record_reg_classes): Process NO_REGS for matching + constraints. Set up mem cost for NO_REGS case. + +2014-05-22 Peter Bergner + + * config/rs6000/htm.md (ttest): Use correct shift value to get CR0. + +2014-05-22 Richard Earnshaw + + PR target/61208 + * arm.md (arm_cmpdi_unsigned): Fix length calculation for Thumb2. + +2014-05-22 Nick Clifton + + * config/msp430/msp430.h (ASM_SPEC): Add spaces after inserted options. + +2014-05-22 Jakub Jelinek + + * tree-streamer-in.c (unpack_ts_real_cst_value_fields): Make sure + all padding bits in REAL_VALUE_TYPE are cleared. + +2014-05-21 Guozhi Wei + + PR target/61202 + * config/aarch64/arm_neon.h (vqdmulh_n_s16): Change the last operand's + constraint. + (vqdmulhq_n_s16): Likewise. + +2014-05-21 Martin Jambor + + * doc/invoke.texi (Optimize Options): Document parameters + ipa-cp-eval-threshold, ipa-max-agg-items, ipa-cp-loop-hint-bonus and + ipa-cp-array-index-hint-bonus. + +2014-05-21 Jakub Jelinek + + PR middle-end/61252 + * omp-low.c (handle_simd_reference): New function. + (lower_rec_input_clauses): Use it. Defer adding reference + initialization even for reduction without placeholder if in simd, + handle it properly later on. + +2014-05-20 Jan Hubicka + + PR bootstrap/60984 + * ipa-inline-transform.c (inline_call): Use add CALLEE_REMOVED + parameter. + * ipa-inline.c (inline_to_all_callers): If callee was removed; return. + (ipa_inline): Loop inline_to_all_callers until no more aliases + are removed. + +2014-05-20 Jan Hubicka + + PR lto/60820 + * varpool.c (varpool_remove_node): Do not alter decls when streaming. + +2014-05-20 DJ Delorie + + * config/msp430/msp430.md (split): Don't allow subregs when + splitting SImode adds. + (andneghi): Fix subtraction logic. + * config/msp430/predicates.md (msp430_nonsubreg_or_imm_operand): New. + +2014-05-20 Nick Clifton + + * config/msp430/msp430.c (TARGET_GIMPLIFY_VA_ARG_EXPR): Define. + (msp430_gimplify_va_arg_expr): New function. + (msp430_print_operand): Handle (CONST (ZERO_EXTRACT)). + + * config/msp430/msp430.md (zero_extendpsisi2): Use + constraint on + operand 0 in order to prevent confusion about the number of + registers involved. + +2014-05-20 Kyrylo Tkachov + + * config/arm/arm.md (arith_shiftsi): Do not predicate for + arm_restrict_it. + +2014-05-19 Richard Earnshaw + + * arm.c (thumb1_reorg): When scanning backwards skip anything + that's not a proper insn. + +2014-05-17 Jan Hubicka + + * ipa.c (symtab_remove_unreachable_nodes): Remove + symbol from comdat group if its body was eliminated. + (comdat_can_be_unshared_p_1): Static symbols can always be privatized. + * symtab.c (symtab_remove_from_same_comdat_group): Break out from ... + (symtab_unregister_node): ... this one. + (verify_symtab_base): More strict checking of comdats. + * cgraph.h (symtab_remove_from_same_comdat_group): Declare. + +2014-05-17 Jan Hubicka + + * opts.c (common_handle_option): Disable -fipa-reference coorectly + with -fuse-profile. + +2014-05-17 Jan Hubicka + + PR ipa/60854 + * ipa.c (symtab_remove_unreachable_nodes): Mark targets of + external aliases alive, too. + +2014-05-17 Uros Bizjak + + * doc/invoke.texi (free): Mention Alpha. Also enabled at -Os. + +2014-05-17 Uros Bizjak + + Backport from mainline + 2014-04-25 H.J. Lu + + PR target/60969 + * config/i386/i386.md (*movsf_internal): Set MODE to SI for + alternative 12. + +2014-05-16 Vladimir Makarov + + PR rtl-optimization/60969 + * ira-costs.c (record_reg_classes): Allow only memory for pseudo. + Calculate costs for this case. + +2014-05-15 Peter Bergner + + PR target/61193 + * config/rs6000/htmxlintrin.h (_HTM_TBEGIN_STARTED): New define. + (__TM_simple_begin): Use it. + (__TM_begin): Likewise. + +2014-05-15 Martin Jambor + + PR ipa/61085 + * ipa-prop.c (update_indirect_edges_after_inlining): Check + type_preserved flag when the indirect edge is polymorphic. + +2014-05-15 Martin Jambor + + PR ipa/60897 + * ipa-prop.c (ipa_modify_formal_parameters): Reset DECL_LANG_SPECIFIC. + +2014-05-15 Jakub Jelinek + + PR tree-optimization/61158 + * fold-const.c (fold_binary_loc): If X is zero-extended and + shiftc >= prec, make sure zerobits is all ones instead of + invoking undefined behavior. + +2014-05-14 Cary Coutant + + PR debug/61013 + * opts.c (common_handle_option): Don't special-case "-g". + (set_debug_level): Default to at least level 2 with "-g". + +2014-05-14 Eric Botcazou + + * config/sparc/sparc-protos.h (sparc_absnegfloat_split_legitimate): + Delete. + * config/sparc/sparc.c (sparc_absnegfloat_split_legitimate): Likewise. + * config/sparc/sparc.md (fptype_ut699): New attribute. + (in_branch_delay): Return false if -mfix-ut699 is specified and + fptype_ut699 is set to single. + (truncdfsf2): Add fptype_ut699 attribute. + (fix_truncdfsi2): Likewise. + (floatsisf2): Change fptype attribute. + (fix_truncsfsi2): Likewise. + (negtf2_notv9): Delete. + (negtf2_v9): Likewise. + (negtf2_hq): New instruction. + (negtf2): New instruction and splitter. + (negdf2_notv9): Rewrite. + (abstf2_notv9): Delete. + (abstf2_hq_v9): Likewise. + (abstf2_v9): Likewise. + (abstf2_hq): New instruction. + (abstf2): New instruction and splitter. + (absdf2_notv9): Rewrite. + +2014-05-14 Matthias Klose + + Revert: + 2014-05-08 Manuel López-Ibáñez + Matthias Klose + + PR driver/61106 + * optc-gen.awk: Fix option handling for -Wunused-parameter. + +2014-05-13 Peter Bergner + + * doc/sourcebuild.texi: (dfp_hw): Document. + (p8vector_hw): Likewise. + (powerpc_eabi_ok): Likewise. + (powerpc_elfv2): Likewise. + (powerpc_htm_ok): Likewise. + (ppc_recip_hw): Likewise. + (vsx_hw): Likewise. + +2014-05-13 Jeff Law + + Backports fromm mainline: + + 2014-05-08 Jeff Law + + PR tree-optimization/61009 + * tree-ssa-threadedge.c (thread_through_normal_block): Return a + tri-state rather than a boolean. When a block is too big to + thread through, inform caller via negative return value. + (thread_across_edge): If a block was too big for normal threading, + then it's too big for a joiner too, so remove temporary equivalences + and return immediately. + + 2014-04-28 Jeff Law + + PR tree-optimization/60902 + * tree-ssa-threadedge.c + (record_temporary_equivalences_from_stmts_at_dest): Only iterate + over real defs when invalidating outputs from statements that do not + produce useful outputs for threading. + + 2014-04-23 Jeff Law + + PR tree-optimization/60902 + * tree-ssa-threadedge.c + (record_temporary_equivalences_from_stmts_at_dest): Make sure to + invalidate outputs from statements that do not produce useful + outputs for threading. + +2014-05-13 Richard Biener + + PR ipa/60973 + * tree-inline.c (remap_gimple_stmt): Clear tail call flag, + it needs revisiting whether the call still may be tail-called. + +2014-05-13 Jakub Jelinek + + PR target/61060 + * config/i386/i386.c (ix86_expand_set_or_movmem): If count_exp + is const0_rtx, return immediately. Don't test count == 0 when + it is always true. + +2014-05-12 Senthil Kumar Selvaraj + + Backport from mainline + 2014-05-12 Senthil Kumar Selvaraj + + PR target/60991 + * config/avr/avr.c (avr_out_store_psi): Use correct constant + to restore Y. + +2014-05-09 Uros Bizjak + + Backport from mainline + 2014-05-08 Uros Bizjak + + PR target/61092 + * config/alpha/alpha.c: Include gimple-iterator.h. + (alpha_gimple_fold_builtin): New function. Move + ALPHA_BUILTIN_UMULH folding from ... + (alpha_fold_builtin): ... here. + (TARGET_GIMPLE_FOLD_BUILTIN): New define. + +2014-05-09 Pitchumani Sivanupandi + + Backport from 2014-04-16 trunk r209446 + 2014-04-16 Pitchumani Sivanupandi + + * config/avr/avr-mcus.def: Correct typo for atxmega256a3bu macro. + +2014-05-09 Georg-Johann Lay + + Backport from 2014-05-09 trunk r210267 + + PR target/61055 + * config/avr/avr.md (cc): Add new attribute set_vzn. + (addqi3, addqq3, adduqq3, subqi3, subqq3, subuqq3, negqi2) [cc]: + Set cc insn attribute to set_vzn instead of set_zn for alternatives + with INC, DEC or NEG. + * config/avr/avr.c (avr_notice_update_cc): Handle SET_VZN. + (avr_out_plus_1): ADIW sets cc0 to CC_SET_CZN. + INC, DEC and ADD+ADC set cc0 to CC_CLOBBER. + +2014-05-08 Manuel López-Ibáñez + Matthias Klose + + PR driver/61106 + * optc-gen.awk: Fix option handling for -Wunused-parameter. + +2014-05-08 Uros Bizjak + + PR target/59952 + * config/i386/i386.c (PTA_HASWELL): Remove PTA_RTM. + +2014-05-05 Marek Polacek + + Back port from mainline + 2014-05-05 Marek Polacek + + PR driver/61065 + * opts.c (common_handle_option): Call error_at instead of warning_at. + +2014-05-04 Jan Hubicka + + PR ipa/60965 + * ipa-devirt.c (get_class_context): Allow POD to change to non-POD. + +2014-05-04 Peter Bergner + + * config/rs6000/rs6000.h (RS6000_BTM_HARD_FLOAT): New define. + (RS6000_BTM_COMMON): Add RS6000_BTM_HARD_FLOAT. + (TARGET_EXTRA_BUILTINS): Add TARGET_HARD_FLOAT. + * config/rs6000/rs6000-builtin.def (BU_MISC_1): + Use RS6000_BTM_HARD_FLOAT. + (BU_MISC_2): Likewise. + * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Handle + RS6000_BTM_HARD_FLOAT. + (rs6000_option_override_internal): Enforce -mhard-float if -mhard-dfp + is explicitly used. + (rs6000_invalid_builtin): Add hard floating builtin support. + (rs6000_expand_builtin): Relax the gcc_assert to allow the new + hard float builtins. + (rs6000_builtin_mask_names): Add RS6000_BTM_HARD_FLOAT. + 2014-05-03 Joey Ye Backport from mainline r209463 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index d43065a..7b43bbd 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20140505 +20140529 diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index b4d3e77..f979c34 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,59 @@ +2014-05-19 Eric Botcazou + + Backport from mainline + 2014-04-22 Richard Henderson + + * init.c [__linux__] (HAVE_GNAT_ALTERNATE_STACK): New define. + (__gnat_alternate_stack): Enable for all linux except ia64. + +2014-05-18 Eric Botcazou + + * utils.c (gnat_write_global_declarations): Adjust the flags put on + dummy_global. + +2014-05-18 Eric Botcazou + + * gcc-interface/decl.c (gnat_to_gnu_entity) : Do not + consider that regular packed arrays can never be superflat. + +2014-05-17 Eric Botcazou + + Backport from mainline + 2014-04-28 Richard Henderson + + * gcc-interface/Makefile.in: Support aarch64-linux. + + 2014-04-28 Eric Botcazou + + * exp_dbug.ads (Get_External_Name): Add 'False' default to Has_Suffix, + add 'Suffix' parameter and adjust comment. + (Get_External_Name_With_Suffix): Delete. + * exp_dbug.adb (Get_External_Name_With_Suffix): Merge into... + (Get_External_Name): ...here. Add 'False' default to Has_Suffix, add + 'Suffix' parameter. + (Get_Encoded_Name): Remove 2nd argument in call to Get_External_Name. + Call Get_External_Name instead of Get_External_Name_With_Suffix. + (Get_Secondary_DT_External_Name): Likewise. + * exp_cg.adb (Write_Call_Info): Likewise. + * exp_disp.adb (Export_DT): Likewise. + (Import_DT): Likewise. + * comperr.ads (Compiler_Abort): Remove Code parameter and add From_GCC + parameter with False default. + * comperr.adb (Compiler_Abort): Likewise. Adjust accordingly. + * types.h (Fat_Pointer): Rename into... + (String_Pointer): ...this. Add comment on interfacing rules. + * fe.h (Compiler_Abort): Adjust for above renaming. + (Error_Msg_N): Likewise. + (Error_Msg_NE): Likewise. + (Get_External_Name): Likewise. Add third parameter. + (Get_External_Name_With_Suffix): Delete. + * gcc-interface/decl.c (STDCALL_PREFIX): Define. + (create_concat_name): Adjust call to Get_External_Name, remove call to + Get_External_Name_With_Suffix, use STDCALL_PREFIX, adjust for renaming. + * gcc-interface/trans.c (post_error): Likewise. + (post_error_ne): Likewise. + * gcc-interface/misc.c (internal_error_function): Likewise. + 2014-04-22 Release Manager * GCC 4.9.0 released. diff --git a/gcc/ada/gcc-interface/decl.c b/gcc/ada/gcc-interface/decl.c index b18b2f7..52452ce 100644 --- a/gcc/ada/gcc-interface/decl.c +++ b/gcc/ada/gcc-interface/decl.c @@ -2435,8 +2435,10 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, int definition) we can just use the high bound of the index type. */ else if ((Nkind (gnat_index) == N_Range && cannot_be_superflat_p (gnat_index)) - /* Packed Array Types are never superflat. */ - || Is_Packed_Array_Type (gnat_entity)) + /* Bit-Packed Array Types are never superflat. */ + || (Is_Packed_Array_Type (gnat_entity) + && Is_Bit_Packed_Array + (Original_Array_Type (gnat_entity)))) gnu_high = gnu_max; /* Otherwise, if the high bound is constant but the low bound is diff --git a/gcc/ada/gcc-interface/utils.c b/gcc/ada/gcc-interface/utils.c index 014fe36..15b7236 100644 --- a/gcc/ada/gcc-interface/utils.c +++ b/gcc/ada/gcc-interface/utils.c @@ -5662,9 +5662,10 @@ gnat_write_global_declarations (void) dummy_global = build_decl (BUILTINS_LOCATION, VAR_DECL, get_identifier (label), void_type_node); + DECL_HARD_REGISTER (dummy_global) = 1; TREE_STATIC (dummy_global) = 1; - TREE_ASM_WRITTEN (dummy_global) = 1; node = varpool_node_for_decl (dummy_global); + node->definition = 1; node->force_output = 1; while (!types_used_by_cur_var_decl->is_empty ()) diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index 3600df7..4f277de 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,9 @@ +2014-05-06 Richard Biener + + * c-opts.c (c_common_post_options): For -freestanding, + -fno-hosted and -fno-builtin disable pattern recognition + if not enabled explicitely. + 2014-04-22 Richard Biener Backport from mainline diff --git a/gcc/c-family/c-opts.c b/gcc/c-family/c-opts.c index e162e49..29e9a35 100644 --- a/gcc/c-family/c-opts.c +++ b/gcc/c-family/c-opts.c @@ -851,6 +851,12 @@ c_common_post_options (const char **pfilename) if (flag_objc_exceptions && !flag_objc_sjlj_exceptions) flag_exceptions = 1; + /* If -ffreestanding, -fno-hosted or -fno-builtin then disable + pattern recognition. */ + if (!global_options_set.x_flag_tree_loop_distribute_patterns + && flag_no_builtin) + flag_tree_loop_distribute_patterns = 0; + /* -Woverlength-strings is off by default, but is enabled by -Wpedantic. It is never enabled in C++, as the minimum limit is not normative in that standard. */ diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index 5f4a207..847b51e 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,9 @@ +2014-05-26 Igor Zamyatin + + PR c/61191 + * c-array-notation.c (fix_builtin_array_notation_fn): Check invalid + function parameters. + 2014-04-24 Jakub Jelinek * c-parser.c (c_parser_omp_atomic): Allow seq_cst before diff --git a/gcc/c/c-array-notation.c b/gcc/c/c-array-notation.c index 0ac6ba8..127f9a1 100644 --- a/gcc/c/c-array-notation.c +++ b/gcc/c/c-array-notation.c @@ -229,6 +229,8 @@ fix_builtin_array_notation_fn (tree an_builtin_fn, tree *new_var) /* Fully fold any EXCESSIVE_PRECISION EXPR that can occur in the function parameter. */ func_parm = c_fully_fold (func_parm, false, NULL); + if (func_parm == error_mark_node) + return error_mark_node; location = EXPR_LOCATION (an_builtin_fn); diff --git a/gcc/cgraph.h b/gcc/cgraph.h index 15310d8..6c3be6d 100644 --- a/gcc/cgraph.h +++ b/gcc/cgraph.h @@ -723,6 +723,7 @@ enum symbol_partitioning_class /* In symtab.c */ void symtab_register_node (symtab_node *); void symtab_unregister_node (symtab_node *); +void symtab_remove_from_same_comdat_group (symtab_node *); void symtab_remove_node (symtab_node *); symtab_node *symtab_get_node (const_tree); symtab_node *symtab_node_for_asm (const_tree asmname); diff --git a/gcc/config.in b/gcc/config.in index af02866..1e85325 100644 --- a/gcc/config.in +++ b/gcc/config.in @@ -1254,6 +1254,13 @@ #endif +/* Define if the linker supports clearing hardware capabilities via mapfile. + */ +#ifndef USED_FOR_TARGET +#undef HAVE_LD_CLEARCAP +#endif + + /* Define if your linker supports --demangle option. */ #ifndef USED_FOR_TARGET #undef HAVE_LD_DEMANGLE diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 747a292..b03d114 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -10111,7 +10111,7 @@ vqdmulh_n_s16 (int16x4_t a, int16_t b) int16x4_t result; __asm__ ("sqdmulh %0.4h,%1.4h,%2.h[0]" : "=w"(result) - : "w"(a), "w"(b) + : "w"(a), "x"(b) : /* No clobbers */); return result; } @@ -10133,7 +10133,7 @@ vqdmulhq_n_s16 (int16x8_t a, int16_t b) int16x8_t result; __asm__ ("sqdmulh %0.8h,%1.8h,%2.h[0]" : "=w"(result) - : "w"(a), "w"(b) + : "w"(a), "x"(b) : /* No clobbers */); return result; } diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index df4cc1b..dc07a02 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -62,6 +62,7 @@ along with GCC; see the file COPYING3. If not see #include "gimple-expr.h" #include "is-a.h" #include "gimple.h" +#include "gimple-iterator.h" #include "gimplify.h" #include "gimple-ssa.h" #include "stringpool.h" @@ -7042,9 +7043,6 @@ alpha_fold_builtin (tree fndecl, int n_args, tree *op, case ALPHA_BUILTIN_MSKQH: return alpha_fold_builtin_mskxx (op, opint, op_const, 0xff, true); - case ALPHA_BUILTIN_UMULH: - return fold_build2 (MULT_HIGHPART_EXPR, alpha_dimode_u, op[0], op[1]); - case ALPHA_BUILTIN_ZAP: opint[1] ^= 0xff; /* FALLTHRU */ @@ -7094,6 +7092,49 @@ alpha_fold_builtin (tree fndecl, int n_args, tree *op, return NULL; } } + +bool +alpha_gimple_fold_builtin (gimple_stmt_iterator *gsi) +{ + bool changed = false; + gimple stmt = gsi_stmt (*gsi); + tree call = gimple_call_fn (stmt); + gimple new_stmt = NULL; + + if (call) + { + tree fndecl = gimple_call_fndecl (stmt); + + if (fndecl) + { + tree arg0, arg1; + + switch (DECL_FUNCTION_CODE (fndecl)) + { + case ALPHA_BUILTIN_UMULH: + arg0 = gimple_call_arg (stmt, 0); + arg1 = gimple_call_arg (stmt, 1); + + new_stmt + = gimple_build_assign_with_ops (MULT_HIGHPART_EXPR, + gimple_call_lhs (stmt), + arg0, + arg1); + break; + default: + break; + } + } + } + + if (new_stmt) + { + gsi_replace (gsi, new_stmt, true); + changed = true; + } + + return changed; +} /* This page contains routines that are used to determine what the function prologue and epilogue code will do and write them out. */ @@ -9790,6 +9831,8 @@ alpha_canonicalize_comparison (int *code, rtx *op0, rtx *op1, #define TARGET_EXPAND_BUILTIN alpha_expand_builtin #undef TARGET_FOLD_BUILTIN #define TARGET_FOLD_BUILTIN alpha_fold_builtin +#undef TARGET_GIMPLE_FOLD_BUILTIN +#define TARGET_GIMPLE_FOLD_BUILTIN alpha_gimple_fold_builtin #undef TARGET_FUNCTION_OK_FOR_SIBCALL #define TARGET_FUNCTION_OK_FOR_SIBCALL alpha_function_ok_for_sibcall diff --git a/gcc/config/arm/aout.h b/gcc/config/arm/aout.h index 51d32a9..c8f4e45 100644 --- a/gcc/config/arm/aout.h +++ b/gcc/config/arm/aout.h @@ -14,8 +14,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ #ifndef ASM_APP_ON diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def index 42f00b4..56041ec 100644 --- a/gcc/config/arm/arm-cores.def +++ b/gcc/config/arm/arm-cores.def @@ -14,8 +14,13 @@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* Before using #include to read this file, define a macro: diff --git a/gcc/config/arm/arm-opts.h b/gcc/config/arm/arm-opts.h index a839397..2190294 100644 --- a/gcc/config/arm/arm-opts.h +++ b/gcc/config/arm/arm-opts.h @@ -13,8 +13,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ #ifndef ARM_OPTS_H diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 91e326e..fbd029b 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -16716,7 +16716,7 @@ thumb1_reorg (void) rtx prev, insn = BB_END (bb); bool insn_clobbered = false; - while (insn != BB_HEAD (bb) && DEBUG_INSN_P (insn)) + while (insn != BB_HEAD (bb) && !NONDEBUG_INSN_P (insn)) insn = PREV_INSN (insn); /* Find the last cbranchsi4_insn in basic block BB. */ diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 597e69c..c60d9a4 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -17,8 +17,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ #ifndef GCC_ARM_H diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 4b81ee2..0284f95 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -8349,8 +8349,8 @@ (define_insn_and_split "*arm_cmpdi_unsigned" [(set (reg:CC_CZ CC_REGNUM) - (compare:CC_CZ (match_operand:DI 0 "s_register_operand" "l,r,r") - (match_operand:DI 1 "arm_di_operand" "Py,r,rDi")))] + (compare:CC_CZ (match_operand:DI 0 "s_register_operand" "l,r,r,r") + (match_operand:DI 1 "arm_di_operand" "Py,r,Di,rDi")))] "TARGET_32BIT" "#" ; "cmp\\t%R0, %R1\;it eq\;cmpeq\\t%Q0, %Q1" @@ -8370,9 +8370,9 @@ operands[1] = gen_lowpart (SImode, operands[1]); } [(set_attr "conds" "set") - (set_attr "enabled_for_depr_it" "yes,yes,no") - (set_attr "arch" "t2,t2,*") - (set_attr "length" "6,6,8") + (set_attr "enabled_for_depr_it" "yes,yes,no,*") + (set_attr "arch" "t2,t2,t2,a") + (set_attr "length" "6,6,10,8") (set_attr "type" "multiple")] ) @@ -9860,6 +9860,7 @@ "TARGET_32BIT" "%i1%?\\t%0, %2, %4%S3" [(set_attr "predicable" "yes") + (set_attr "predicable_short_it" "no") (set_attr "shift" "4") (set_attr "arch" "a,t2,t2,a") ;; Thumb2 doesn't allow the stack pointer to be used for diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h index bc223f8..7a576ac 100644 --- a/gcc/config/arm/bpabi.h +++ b/gcc/config/arm/bpabi.h @@ -14,8 +14,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* Use the AAPCS ABI by default. */ diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h index 2ac8c8d..f14c766 100644 --- a/gcc/config/arm/elf.h +++ b/gcc/config/arm/elf.h @@ -16,8 +16,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ #ifndef OBJECT_FORMAT_ELF diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h index 5dc3328..2bf361a 100644 --- a/gcc/config/arm/linux-elf.h +++ b/gcc/config/arm/linux-elf.h @@ -14,8 +14,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* elfos.h should have already been included. Now just override diff --git a/gcc/config/arm/linux-gas.h b/gcc/config/arm/linux-gas.h index 52a739c..1dd0437 100644 --- a/gcc/config/arm/linux-gas.h +++ b/gcc/config/arm/linux-gas.h @@ -15,8 +15,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* This is how we tell the assembler that a symbol is weak. diff --git a/gcc/config/arm/netbsd-elf.h b/gcc/config/arm/netbsd-elf.h index 9deda96..645551f 100644 --- a/gcc/config/arm/netbsd-elf.h +++ b/gcc/config/arm/netbsd-elf.h @@ -14,8 +14,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* Run-time Target Specification. */ diff --git a/gcc/config/arm/uclinux-eabi.h b/gcc/config/arm/uclinux-eabi.h index b5055ce..4d57d13 100644 --- a/gcc/config/arm/uclinux-eabi.h +++ b/gcc/config/arm/uclinux-eabi.h @@ -14,8 +14,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* Override settings that are different to the uclinux-elf or diff --git a/gcc/config/arm/uclinux-elf.h b/gcc/config/arm/uclinux-elf.h index 5cd4fe5..43edba7 100644 --- a/gcc/config/arm/uclinux-elf.h +++ b/gcc/config/arm/uclinux-elf.h @@ -14,8 +14,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* We don't want a PLT. */ diff --git a/gcc/config/arm/vxworks.h b/gcc/config/arm/vxworks.h index 8bef16b..faf8472 100644 --- a/gcc/config/arm/vxworks.h +++ b/gcc/config/arm/vxworks.h @@ -17,8 +17,13 @@ but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING3. If not see +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ diff --git a/gcc/config/avr/avr-mcus.def b/gcc/config/avr/avr-mcus.def index 3cf2fcd..483a303 100644 --- a/gcc/config/avr/avr-mcus.def +++ b/gcc/config/avr/avr-mcus.def @@ -291,7 +291,7 @@ AVR_MCU ("atxmega192a3", ARCH_AVRXMEGA6, AVR_ISA_NONE, "__AVR_ATxmega192A3__ AVR_MCU ("atxmega192d3", ARCH_AVRXMEGA6, AVR_ISA_NONE, "__AVR_ATxmega192D3__", 0x2000, 4, "x192d3") AVR_MCU ("atxmega256a3", ARCH_AVRXMEGA6, AVR_ISA_NONE, "__AVR_ATxmega256A3__", 0x2000, 5, "x256a3") AVR_MCU ("atxmega256a3b", ARCH_AVRXMEGA6, AVR_ISA_NONE, "__AVR_ATxmega256A3B__", 0x2000, 5, "x256a3b") -AVR_MCU ("atxmega256a3bu", ARCH_AVRXMEGA6, AVR_ISA_NONE, "__AVR_ATxmega258A3BU__", 0x2000, 5, "x256a3bu") +AVR_MCU ("atxmega256a3bu", ARCH_AVRXMEGA6, AVR_ISA_NONE, "__AVR_ATxmega256A3BU__", 0x2000, 5, "x256a3bu") AVR_MCU ("atxmega256d3", ARCH_AVRXMEGA6, AVR_ISA_NONE, "__AVR_ATxmega256D3__", 0x2000, 5, "x256d3") AVR_MCU ("atxmega128a3u", ARCH_AVRXMEGA6, AVR_ISA_RMW, "__AVR_ATxmega128A3U__", 0x2000, 3, "x128a3u") AVR_MCU ("atxmega128b1", ARCH_AVRXMEGA6, AVR_ISA_RMW, "__AVR_ATxmega128B1__", 0x2000, 3, "x128b1") diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 99644ec..fa979df 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -2353,6 +2353,12 @@ avr_notice_update_cc (rtx body ATTRIBUTE_UNUSED, rtx insn) } break; + case CC_SET_VZN: + /* Insn like INC, DEC, NEG that set Z,N,V. We currently don't make use + of this combination, cf. also PR61055. */ + CC_STATUS_INIT; + break; + case CC_SET_CZN: /* Insn sets the Z,N,C flags of CC to recog_operand[0]. The V flag may or may not be known but that's ok because @@ -3987,7 +3993,7 @@ avr_out_store_psi (rtx insn, rtx *op, int *plen) "std Y+61,%A1" CR_TAB "std Y+62,%B1" CR_TAB "std Y+63,%C1" CR_TAB - "sbiw r28,%o0-60", op, plen, -5); + "sbiw r28,%o0-61", op, plen, -5); return avr_asm_len ("subi r28,lo8(-%o0)" CR_TAB "sbci r29,hi8(-%o0)" CR_TAB @@ -6284,7 +6290,7 @@ avr_out_plus_1 (rtx *xop, int *plen, enum rtx_code code, int *pcc, if (REG_P (xop[2])) { - *pcc = MINUS == code ? (int) CC_SET_CZN : (int) CC_SET_N; + *pcc = MINUS == code ? (int) CC_SET_CZN : (int) CC_CLOBBER; for (i = 0; i < n_bytes; i++) { @@ -6393,7 +6399,7 @@ avr_out_plus_1 (rtx *xop, int *plen, enum rtx_code code, int *pcc, op, plen, 1); if (n_bytes == 2 && PLUS == code) - *pcc = CC_SET_ZN; + *pcc = CC_SET_CZN; } i++; @@ -6416,6 +6422,7 @@ avr_out_plus_1 (rtx *xop, int *plen, enum rtx_code code, int *pcc, { avr_asm_len ((code == PLUS) ^ (val8 == 1) ? "dec %0" : "inc %0", op, plen, 1); + *pcc = CC_CLOBBER; break; } diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index d7baa4a..2c59bf3 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -90,7 +90,7 @@ (include "constraints.md") ;; Condition code settings. -(define_attr "cc" "none,set_czn,set_zn,set_n,compare,clobber, +(define_attr "cc" "none,set_czn,set_zn,set_vzn,set_n,compare,clobber, plus,ldi" (const_string "none")) @@ -1098,7 +1098,7 @@ inc %0\;inc %0 dec %0\;dec %0" [(set_attr "length" "1,1,1,1,2,2") - (set_attr "cc" "set_czn,set_czn,set_zn,set_zn,set_zn,set_zn")]) + (set_attr "cc" "set_czn,set_czn,set_vzn,set_vzn,set_vzn,set_vzn")]) ;; "addhi3" ;; "addhq3" "adduhq3" @@ -1369,7 +1369,7 @@ dec %0\;dec %0 inc %0\;inc %0" [(set_attr "length" "1,1,1,1,2,2") - (set_attr "cc" "set_czn,set_czn,set_zn,set_zn,set_zn,set_zn")]) + (set_attr "cc" "set_czn,set_czn,set_vzn,set_vzn,set_vzn,set_vzn")]) ;; "subhi3" ;; "subhq3" "subuhq3" @@ -3992,7 +3992,7 @@ "" "neg %0" [(set_attr "length" "1") - (set_attr "cc" "set_zn")]) + (set_attr "cc" "set_vzn")]) (define_insn "*negqihi2" [(set (match_operand:HI 0 "register_operand" "=r") diff --git a/gcc/config/dbx.h b/gcc/config/dbx.h index 1b68bcd..8173bb0 100644 --- a/gcc/config/dbx.h +++ b/gcc/config/dbx.h @@ -13,8 +13,13 @@ but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING3. If not see +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* This file causes gcc to prefer using DBX (stabs) debugging diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index ef18f24..2d4a280 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3128,7 +3128,7 @@ ix86_option_override_internal (bool main_args_p, (PTA_SANDYBRIDGE | PTA_FSGSBASE | PTA_RDRND | PTA_F16C) #define PTA_HASWELL \ (PTA_IVYBRIDGE | PTA_AVX2 | PTA_BMI | PTA_BMI2 | PTA_LZCNT \ - | PTA_FMA | PTA_MOVBE | PTA_RTM | PTA_HLE) + | PTA_FMA | PTA_MOVBE | PTA_HLE) #define PTA_BROADWELL \ (PTA_HASWELL | PTA_ADX | PTA_PRFCHW | PTA_RDSEED) #define PTA_BONNELL \ @@ -24151,8 +24151,13 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp, align = MEM_ALIGN (dst) / BITS_PER_UNIT; if (CONST_INT_P (count_exp)) - min_size = max_size = probable_max_size = count = expected_size - = INTVAL (count_exp); + { + min_size = max_size = probable_max_size = count = expected_size + = INTVAL (count_exp); + /* When COUNT is 0, there is nothing to do. */ + if (!count) + return true; + } else { if (min_size_exp) @@ -24161,7 +24166,7 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp, max_size = INTVAL (max_size_exp); if (probable_max_size_exp) probable_max_size = INTVAL (probable_max_size_exp); - if (CONST_INT_P (expected_size_exp) && count == 0) + if (CONST_INT_P (expected_size_exp)) expected_size = INTVAL (expected_size_exp); } @@ -37797,10 +37802,10 @@ ix86_rtx_costs (rtx x, int code_i, int outer_code_i, int opno, int *total, else if (TARGET_64BIT && !x86_64_zext_immediate_operand (x, VOIDmode)) *total = 2; else if (flag_pic && SYMBOLIC_CONST (x) - && (!TARGET_64BIT - || (!GET_CODE (x) != LABEL_REF - && (GET_CODE (x) != SYMBOL_REF - || !SYMBOL_REF_LOCAL_P (x))))) + && !(TARGET_64BIT + && (GET_CODE (x) == LABEL_REF + || (GET_CODE (x) == SYMBOL_REF + && SYMBOL_REF_LOCAL_P (x))))) *total = 1; else *total = 0; diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 9f103cf..fde0a93 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3201,7 +3201,7 @@ (const_string "1") (const_string "*"))) (set (attr "mode") - (cond [(eq_attr "alternative" "3,4,9,10,13,14,15") + (cond [(eq_attr "alternative" "3,4,9,10,12,13,14,15") (const_string "SI") (eq_attr "alternative" "11") (const_string "DI") diff --git a/gcc/config/initfini-array.h b/gcc/config/initfini-array.h index f7ae836..67e66f6 100644 --- a/gcc/config/initfini-array.h +++ b/gcc/config/initfini-array.h @@ -14,8 +14,13 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ #ifdef HAVE_INITFINI_ARRAY_SUPPORT diff --git a/gcc/config/msp430/msp430.c b/gcc/config/msp430/msp430.c index c844aa2..9eb1409 100644 --- a/gcc/config/msp430/msp430.c +++ b/gcc/config/msp430/msp430.c @@ -730,6 +730,97 @@ msp430_get_raw_result_mode (int regno ATTRIBUTE_UNUSED) { return Pmode; } + +#undef TARGET_GIMPLIFY_VA_ARG_EXPR +#define TARGET_GIMPLIFY_VA_ARG_EXPR msp430_gimplify_va_arg_expr + +#include "gimplify.h" +#include "gimple-expr.h" + +static tree +msp430_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p, + gimple_seq *post_p) +{ + tree addr, t, type_size, rounded_size, valist_tmp; + unsigned HOST_WIDE_INT align, boundary; + bool indirect; + + indirect = pass_by_reference (NULL, TYPE_MODE (type), type, false); + if (indirect) + type = build_pointer_type (type); + + align = PARM_BOUNDARY / BITS_PER_UNIT; + boundary = targetm.calls.function_arg_boundary (TYPE_MODE (type), type); + + /* When we align parameter on stack for caller, if the parameter + alignment is beyond MAX_SUPPORTED_STACK_ALIGNMENT, it will be + aligned at MAX_SUPPORTED_STACK_ALIGNMENT. We will match callee + here with caller. */ + if (boundary > MAX_SUPPORTED_STACK_ALIGNMENT) + boundary = MAX_SUPPORTED_STACK_ALIGNMENT; + + boundary /= BITS_PER_UNIT; + + /* Hoist the valist value into a temporary for the moment. */ + valist_tmp = get_initialized_tmp_var (valist, pre_p, NULL); + + /* va_list pointer is aligned to PARM_BOUNDARY. If argument actually + requires greater alignment, we must perform dynamic alignment. */ + if (boundary > align + && !integer_zerop (TYPE_SIZE (type))) + { + /* FIXME: This is where this function diverts from targhooks.c: + std_gimplify_va_arg_expr(). It works, but I do not know why... */ + if (! POINTER_TYPE_P (type)) + { + t = build2 (MODIFY_EXPR, TREE_TYPE (valist), valist_tmp, + fold_build_pointer_plus_hwi (valist_tmp, boundary - 1)); + gimplify_and_add (t, pre_p); + + t = build2 (MODIFY_EXPR, TREE_TYPE (valist), valist_tmp, + fold_build2 (BIT_AND_EXPR, TREE_TYPE (valist), + valist_tmp, + build_int_cst (TREE_TYPE (valist), -boundary))); + gimplify_and_add (t, pre_p); + } + } + else + boundary = align; + + /* If the actual alignment is less than the alignment of the type, + adjust the type accordingly so that we don't assume strict alignment + when dereferencing the pointer. */ + boundary *= BITS_PER_UNIT; + if (boundary < TYPE_ALIGN (type)) + { + type = build_variant_type_copy (type); + TYPE_ALIGN (type) = boundary; + } + + /* Compute the rounded size of the type. */ + type_size = size_in_bytes (type); + rounded_size = round_up (type_size, align); + + /* Reduce rounded_size so it's sharable with the postqueue. */ + gimplify_expr (&rounded_size, pre_p, post_p, is_gimple_val, fb_rvalue); + + /* Get AP. */ + addr = valist_tmp; + + /* Compute new value for AP. */ + t = fold_build_pointer_plus (valist_tmp, rounded_size); + t = build2 (MODIFY_EXPR, TREE_TYPE (valist), valist, t); + gimplify_and_add (t, pre_p); + + addr = fold_convert (build_pointer_type (type), addr); + + if (indirect) + addr = build_va_arg_indirect_ref (addr); + + addr = build_va_arg_indirect_ref (addr); + + return addr; +} /* Addressing Modes */ @@ -2185,8 +2276,32 @@ msp430_print_operand (FILE * file, rtx op, int letter) msp430_print_operand_addr (file, addr); break; - case CONST_INT: case CONST: + if (GET_CODE (XEXP (op, 0)) == ZERO_EXTRACT) + { + op = XEXP (op, 0); + switch (INTVAL (XEXP (op, 2))) + { + case 0: + fprintf (file, "#lo ("); + msp430_print_operand_raw (file, XEXP (op, 0)); + fprintf (file, ")"); + break; + + case 16: + fprintf (file, "#hi ("); + msp430_print_operand_raw (file, XEXP (op, 0)); + fprintf (file, ")"); + break; + + default: + output_operand_lossage ("invalid zero extract"); + break; + } + break; + } + /* Fall through. */ + case CONST_INT: case SYMBOL_REF: case LABEL_REF: if (letter == 0) diff --git a/gcc/config/msp430/msp430.h b/gcc/config/msp430/msp430.h index 65d6ad6..044e558 100644 --- a/gcc/config/msp430/msp430.h +++ b/gcc/config/msp430/msp430.h @@ -55,8 +55,8 @@ extern bool msp430x; "%{mcpu=*:-mcpu=%*}%{!mcpu=*:%{mmcu=*:-mmcu=%*}} " /* Pass the CPU type on to the assembler. */ \ "%{mrelax=-mQ} " /* Pass the relax option on to the assembler. */ \ "%{mlarge:-ml} " /* Tell the assembler if we are building for the LARGE pointer model. */ \ - "%{!msim:-md} %{msim:%{mlarge:-md}}" /* Copy data from ROM to RAM if necessary. */ \ - "%{ffunction-sections:-gdwarf-sections}" /* If function sections are being created then create DWARF line number sections as well. */ + "%{!msim:-md} %{msim:%{mlarge:-md}} " /* Copy data from ROM to RAM if necessary. */ \ + "%{ffunction-sections:-gdwarf-sections} " /* If function sections are being created then create DWARF line number sections as well. */ /* Enable linker section garbage collection by default, unless we are creating a relocatable binary (gc does not work) or debugging diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md index 74a98b4..b5114f9 100644 --- a/gcc/config/msp430/msp430.md +++ b/gcc/config/msp430/msp430.md @@ -362,8 +362,8 @@ ; halves. (define_split [(set (match_operand:SI 0 "msp430_nonsubreg_operand") - (plus:SI (match_operand:SI 1 "nonimmediate_operand") - (match_operand:SI 2 "general_operand"))) + (plus:SI (match_operand:SI 1 "msp430_nonsubreg_operand") + (match_operand:SI 2 "msp430_nonsubreg_or_imm_operand"))) ] "" [(parallel [(set (match_operand:HI 3 "nonimmediate_operand" "=&rm") @@ -609,9 +609,15 @@ ; when the PSI value is negative.. ; ; Note: using PUSHM.A #1 is two bytes smaller than using PUSHX.A.... +; +; Note: We use a + constraint on operand 0 as otherwise GCC gets confused +; about extending a single PSI mode register into a pair of SImode registers +; with the same starting register. It thinks that the upper register of +; the pair is unused and so it can clobber it. Try compiling 20050826-2.c +; at -O2 to see this. (define_insn "zero_extendpsisi2" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand" "+r") (zero_extend:SI (match_operand:PSI 1 "register_operand" "r")))] "" "* @@ -1311,9 +1317,9 @@ "" "* if (REGNO (operands[0]) != REGNO (operands[1])) - return \"MOV.W\t%1, %0 { SUB.W\t#0, %0 { AND.W\t%2, %0\"; + return \"MOV.W\t%1, %0 { INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\"; else - return \"SUB.W\t#0, %0 { AND.W\t%2, %0\"; + return \"INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\"; " ) diff --git a/gcc/config/msp430/predicates.md b/gcc/config/msp430/predicates.md index 9a8e2da..94a628c 100644 --- a/gcc/config/msp430/predicates.md +++ b/gcc/config/msp430/predicates.md @@ -73,6 +73,10 @@ (define_predicate "msp430_nonsubreg_operand" (match_code "reg,mem")) +(define_predicate "msp430_nonsubreg_or_imm_operand" + (ior (match_operand 0 "msp430_nonsubreg_operand") + (match_operand 0 "immediate_operand"))) + ; TRUE for constants which are bit positions for zero_extract (define_predicate "msp430_bitpos" (and (match_code "const_int") diff --git a/gcc/config/newlib-stdint.h b/gcc/config/newlib-stdint.h index f4a78a5..47445e4 100644 --- a/gcc/config/newlib-stdint.h +++ b/gcc/config/newlib-stdint.h @@ -13,8 +13,13 @@ but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING3. If not see +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* newlib uses 32-bit long in certain cases for all non-SPU diff --git a/gcc/config/rs6000/htm.md b/gcc/config/rs6000/htm.md index 9dbb499..ca7f7fd 100644 --- a/gcc/config/rs6000/htm.md +++ b/gcc/config/rs6000/htm.md @@ -179,7 +179,7 @@ (const_int 0)] UNSPECV_HTM_TABORTWCI)) (set (subreg:CC (match_dup 2) 0) (match_dup 1)) - (set (match_dup 3) (lshiftrt:SI (match_dup 2) (const_int 24))) + (set (match_dup 3) (lshiftrt:SI (match_dup 2) (const_int 28))) (parallel [(set (match_operand:SI 0 "int_reg_operand" "") (and:SI (match_dup 3) (const_int 15))) (clobber (scratch:CC))])] diff --git a/gcc/config/rs6000/htmxlintrin.h b/gcc/config/rs6000/htmxlintrin.h index 38dc066..bf7fe3a 100644 --- a/gcc/config/rs6000/htmxlintrin.h +++ b/gcc/config/rs6000/htmxlintrin.h @@ -46,12 +46,17 @@ extern "C" { typedef char TM_buff_type[16]; +/* Compatibility macro with s390. This macro can be used to determine + whether a transaction was successfully started from the __TM_begin() + and __TM_simple_begin() intrinsic functions below. */ +#define _HTM_TBEGIN_STARTED 1 + extern __inline long __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) __TM_simple_begin (void) { if (__builtin_expect (__builtin_tbegin (0), 1)) - return 1; + return _HTM_TBEGIN_STARTED; return 0; } @@ -61,7 +66,7 @@ __TM_begin (void* const TM_buff) { *_TEXASRL_PTR (TM_buff) = 0; if (__builtin_expect (__builtin_tbegin (0), 1)) - return 1; + return _HTM_TBEGIN_STARTED; #ifdef __powerpc64__ *_TEXASR_PTR (TM_buff) = __builtin_get_texasr (); #else diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 16793f5..8e15bdf 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -626,7 +626,7 @@ #define BU_MISC_1(ENUM, NAME, ATTR, ICODE) \ RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_ALWAYS, /* MASK */ \ + RS6000_BTM_HARD_FLOAT, /* MASK */ \ (RS6000_BTC_ ## ATTR /* ATTR */ \ | RS6000_BTC_UNARY), \ CODE_FOR_ ## ICODE) /* ICODE */ @@ -634,7 +634,7 @@ #define BU_MISC_2(ENUM, NAME, ATTR, ICODE) \ RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_ALWAYS, /* MASK */ \ + RS6000_BTM_HARD_FLOAT, /* MASK */ \ (RS6000_BTC_ ## ATTR /* ATTR */ \ | RS6000_BTC_BINARY), \ CODE_FOR_ ## ICODE) /* ICODE */ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index f4b34a2..fcb884f 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3036,7 +3036,8 @@ rs6000_builtin_mask_calculate (void) | ((TARGET_P8_VECTOR) ? RS6000_BTM_P8_VECTOR : 0) | ((TARGET_CRYPTO) ? RS6000_BTM_CRYPTO : 0) | ((TARGET_HTM) ? RS6000_BTM_HTM : 0) - | ((TARGET_DFP) ? RS6000_BTM_DFP : 0)); + | ((TARGET_DFP) ? RS6000_BTM_DFP : 0) + | ((TARGET_HARD_FLOAT) ? RS6000_BTM_HARD_FLOAT : 0)); } /* Override command line options. Mostly we process the processor type and @@ -3393,6 +3394,13 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~OPTION_MASK_VSX_TIMODE; } + if (TARGET_DFP && !TARGET_HARD_FLOAT) + { + if (rs6000_isa_flags_explicit & OPTION_MASK_DFP) + error ("-mhard-dfp requires -mhard-float"); + rs6000_isa_flags &= ~OPTION_MASK_DFP; + } + /* The quad memory instructions only works in 64-bit mode. In 32-bit mode, silently turn off quad memory mode. */ if ((TARGET_QUAD_MEMORY || TARGET_QUAD_MEMORY_ATOMIC) && !TARGET_POWERPC64) @@ -6110,7 +6118,8 @@ mem_operand_gpr (rtx op, enum machine_mode mode) return false; extra = GET_MODE_SIZE (mode) - UNITS_PER_WORD; - gcc_assert (extra >= 0); + if (extra < 0) + extra = 0; if (GET_CODE (addr) == LO_SUM) /* For lo_sum addresses, we must allow any offset except one that @@ -13556,6 +13565,8 @@ rs6000_invalid_builtin (enum rs6000_builtins fncode) error ("Builtin function %s requires the -mhard-dfp option", name); else if ((fnmask & RS6000_BTM_P8_VECTOR) != 0) error ("Builtin function %s requires the -mpower8-vector option", name); + else if ((fnmask & RS6000_BTM_HARD_FLOAT) != 0) + error ("Builtin function %s requires the -mhard-float option", name); else error ("Builtin function %s is not supported with the current options", name); @@ -13744,7 +13755,10 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, return ret; } - gcc_assert (TARGET_ALTIVEC || TARGET_VSX || TARGET_SPE || TARGET_PAIRED_FLOAT); + unsigned attr = rs6000_builtin_info[uns_fcode].attr & RS6000_BTC_TYPE_MASK; + gcc_assert (attr == RS6000_BTC_UNARY + || attr == RS6000_BTC_BINARY + || attr == RS6000_BTC_TERNARY); /* Handle simple unary operations. */ d = bdesc_1arg; @@ -31299,6 +31313,7 @@ static struct rs6000_opt_mask const rs6000_builtin_mask_names[] = { "crypto", RS6000_BTM_CRYPTO, false, false }, { "htm", RS6000_BTM_HTM, false, false }, { "hard-dfp", RS6000_BTM_DFP, false, false }, + { "hard-float", RS6000_BTM_HARD_FLOAT, false, false }, }; /* Option variables that we want to support inside attribute((target)) and diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 5a96beb..21330dc 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -624,7 +624,8 @@ extern int rs6000_vector_align[]; || TARGET_CMPB /* ISA 2.05 */ \ || TARGET_POPCNTD /* ISA 2.06 */ \ || TARGET_ALTIVEC \ - || TARGET_VSX))) + || TARGET_VSX \ + || TARGET_HARD_FLOAT))) /* E500 cores only support plain "sync", not lwsync. */ #define TARGET_NO_LWSYNC (rs6000_cpu == PROCESSOR_PPC8540 \ @@ -2517,6 +2518,7 @@ extern int frame_pointer_needed; #define RS6000_BTM_POPCNTD MASK_POPCNTD /* Target supports ISA 2.06. */ #define RS6000_BTM_CELL MASK_FPRND /* Target is cell powerpc. */ #define RS6000_BTM_DFP MASK_DFP /* Decimal floating point. */ +#define RS6000_BTM_HARD_FLOAT MASK_SOFT_FLOAT /* Hardware floating point. */ #define RS6000_BTM_COMMON (RS6000_BTM_ALTIVEC \ | RS6000_BTM_VSX \ @@ -2529,7 +2531,8 @@ extern int frame_pointer_needed; | RS6000_BTM_HTM \ | RS6000_BTM_POPCNTD \ | RS6000_BTM_CELL \ - | RS6000_BTM_DFP) + | RS6000_BTM_DFP \ + | RS6000_BTM_HARD_FLOAT) /* Define builtin enum index. */ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index e853bc4..d737195 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -746,7 +746,7 @@ (define_insn "*extendsidi2_lfiwax" [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,??wm,!wl,!wu") - (sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r,r,Z,Z")))] + (sign_extend:DI (match_operand:SI 1 "lwa_operand" "Y,r,r,Z,Z")))] "TARGET_POWERPC64 && TARGET_LFIWAX" "@ lwa%U1%X1 %0,%1 @@ -769,7 +769,7 @@ (define_insn "*extendsidi2_nocell" [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") - (sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r")))] + (sign_extend:DI (match_operand:SI 1 "lwa_operand" "Y,r")))] "TARGET_POWERPC64 && rs6000_gen_cell_microcode && !TARGET_LFIWAX" "@ lwa%U1%X1 %0,%1 diff --git a/gcc/config/rtems.h b/gcc/config/rtems.h index 3da27c5..f14aed3 100644 --- a/gcc/config/rtems.h +++ b/gcc/config/rtems.h @@ -13,8 +13,13 @@ but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING3. If not see +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* The system headers under RTEMS are C++-aware. */ diff --git a/gcc/config/sol2-clearcap.map b/gcc/config/sol2-clearcap.map new file mode 100644 index 0000000..2d880c9 --- /dev/null +++ b/gcc/config/sol2-clearcap.map @@ -0,0 +1,2 @@ +# Clear all hardware capabilities emitted by Sun as. +hwcap_1 = V0x0 OVERRIDE; diff --git a/gcc/config/sol2-clearcapv2.map b/gcc/config/sol2-clearcapv2.map new file mode 100644 index 0000000..3c0cace --- /dev/null +++ b/gcc/config/sol2-clearcapv2.map @@ -0,0 +1,7 @@ +# Clear all hardware capabilities emitted by Sun as. +# +# Uses mapfile v2 syntax which is the only way to clear AT_SUN_CAP_HW2 flags. +$mapfile_version 2 +CAPABILITY { + HW = ; +}; diff --git a/gcc/config/sol2.h b/gcc/config/sol2.h index 2a657db..cab7e6b 100644 --- a/gcc/config/sol2.h +++ b/gcc/config/sol2.h @@ -183,12 +183,21 @@ along with GCC; see the file COPYING3. If not see #define LINK_LIBGCC_MAPFILE_SPEC "" #endif +/* Clear hardware capabilities, either explicitly or with OpenMP: + #pragma openmp declare simd creates clones for SSE2, AVX, and AVX2. */ +#ifdef HAVE_LD_CLEARCAP +#define LINK_CLEARCAP_SPEC " %{mclear-hwcap|fopenmp*:-M %sclearcap.map}" +#else +#define LINK_CLEARCAP_SPEC "" +#endif + #undef LINK_SPEC #define LINK_SPEC \ "%{h*} %{v:-V} \ %{!shared:%{!static:%{rdynamic: " RDYNAMIC_SPEC "}}} \ %{static:-dn -Bstatic} \ - %{shared:-G -dy %{!mimpure-text:-z text}} " LINK_LIBGCC_MAPFILE_SPEC " \ + %{shared:-G -dy %{!mimpure-text:-z text}} " \ + LINK_LIBGCC_MAPFILE_SPEC LINK_CLEARCAP_SPEC " \ %{symbolic:-Bsymbolic -G -dy -z text} \ %(link_arch) \ %{Qy:} %{!Qn:-Qy}" diff --git a/gcc/config/sol2.opt b/gcc/config/sol2.opt index a5ae7c5..16a3e5f 100644 --- a/gcc/config/sol2.opt +++ b/gcc/config/sol2.opt @@ -27,6 +27,10 @@ Driver Joined Ym, Driver Joined +mclear-hwcap +Target Report +Clear hardware capabilities when linking + mimpure-text Target Report Pass -z text to linker diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h index 1d63e46..ee2091b 100644 --- a/gcc/config/sparc/sparc-protos.h +++ b/gcc/config/sparc/sparc-protos.h @@ -69,7 +69,6 @@ extern bool sparc_expand_move (enum machine_mode, rtx *); extern void sparc_emit_set_symbolic_const64 (rtx, rtx, rtx); extern int sparc_splitdi_legitimate (rtx, rtx); extern int sparc_split_regreg_legitimate (rtx, rtx); -extern int sparc_absnegfloat_split_legitimate (rtx, rtx); extern const char *output_ubranch (rtx, rtx); extern const char *output_cbranch (rtx, rtx, int, int, int, rtx); extern const char *output_return (rtx); diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index f52b976..5b00cca 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -8539,22 +8539,6 @@ sparc_split_regreg_legitimate (rtx reg1, rtx reg2) return 0; } -/* Return 1 if x and y are some kind of REG and they refer to - different hard registers. This test is guaranteed to be - run after reload. */ - -int -sparc_absnegfloat_split_legitimate (rtx x, rtx y) -{ - if (GET_CODE (x) != REG) - return 0; - if (GET_CODE (y) != REG) - return 0; - if (REGNO (x) == REGNO (y)) - return 0; - return 1; -} - /* Return 1 if REGNO (reg1) is even and REGNO (reg1) == REGNO (reg2) - 1. This makes them candidates for using ldd and std insns. diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index e2a4669..76c3315 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -424,6 +424,10 @@ (define_attr "fptype" "single,double" (const_string "single")) +;; FP precision specific to the UT699. +(define_attr "fptype_ut699" "none,single" + (const_string "none")) + ;; UltraSPARC-III integer load type. (define_attr "us3load_type" "2cycle,3cycle" (const_string "2cycle")) @@ -464,7 +468,8 @@ (const_string "false") (and (eq_attr "fix_ut699" "true") (and (eq_attr "type" "fpload,fp,fpmove,fpmul,fpdivs,fpsqrts") - (eq_attr "fptype" "single"))) + (ior (eq_attr "fptype" "single") + (eq_attr "fptype_ut699" "single")))) (const_string "false") (eq_attr "length" "1") (const_string "true") @@ -3455,7 +3460,8 @@ "TARGET_FPU" "fdtos\t%1, %0" [(set_attr "type" "fp") - (set_attr "fptype" "double")]) + (set_attr "fptype" "double") + (set_attr "fptype_ut699" "single")]) (define_expand "trunctfsf2" [(set (match_operand:SF 0 "register_operand" "") @@ -3496,7 +3502,7 @@ "TARGET_FPU" "fitos\t%1, %0" [(set_attr "type" "fp") - (set_attr "fptype" "double")]) + (set_attr "fptype" "single")]) (define_insn "floatsidf2" [(set (match_operand:DF 0 "register_operand" "=e") @@ -3583,7 +3589,7 @@ "TARGET_FPU" "fstoi\t%1, %0" [(set_attr "type" "fp") - (set_attr "fptype" "double")]) + (set_attr "fptype" "single")]) (define_insn "fix_truncdfsi2" [(set (match_operand:SI 0 "register_operand" "=f") @@ -3591,7 +3597,8 @@ "TARGET_FPU" "fdtoi\t%1, %0" [(set_attr "type" "fp") - (set_attr "fptype" "double")]) + (set_attr "fptype" "double") + (set_attr "fptype_ut699" "single")]) (define_expand "fix_trunctfsi2" [(set (match_operand:SI 0 "register_operand" "") @@ -5554,53 +5561,52 @@ [(set_attr "type" "fpdivs")]) (define_expand "negtf2" - [(set (match_operand:TF 0 "register_operand" "=e,e") - (neg:TF (match_operand:TF 1 "register_operand" "0,e")))] + [(set (match_operand:TF 0 "register_operand" "") + (neg:TF (match_operand:TF 1 "register_operand" "")))] "TARGET_FPU" "") -(define_insn_and_split "*negtf2_notv9" - [(set (match_operand:TF 0 "register_operand" "=e,e") - (neg:TF (match_operand:TF 1 "register_operand" "0,e")))] - ; We don't use quad float insns here so we don't need TARGET_HARD_QUAD. - "TARGET_FPU - && ! TARGET_V9" - "@ - fnegs\t%0, %0 - #" - "&& reload_completed - && sparc_absnegfloat_split_legitimate (operands[0], operands[1])" - [(set (match_dup 2) (neg:SF (match_dup 3))) - (set (match_dup 4) (match_dup 5)) - (set (match_dup 6) (match_dup 7))] - "operands[2] = gen_rtx_raw_REG (SFmode, REGNO (operands[0])); - operands[3] = gen_rtx_raw_REG (SFmode, REGNO (operands[1])); - operands[4] = gen_rtx_raw_REG (SFmode, REGNO (operands[0]) + 1); - operands[5] = gen_rtx_raw_REG (SFmode, REGNO (operands[1]) + 1); - operands[6] = gen_rtx_raw_REG (DFmode, REGNO (operands[0]) + 2); - operands[7] = gen_rtx_raw_REG (DFmode, REGNO (operands[1]) + 2);" - [(set_attr "type" "fpmove,*") - (set_attr "length" "*,2")]) - -(define_insn_and_split "*negtf2_v9" - [(set (match_operand:TF 0 "register_operand" "=e,e") - (neg:TF (match_operand:TF 1 "register_operand" "0,e")))] - ; We don't use quad float insns here so we don't need TARGET_HARD_QUAD. - "TARGET_FPU && TARGET_V9" - "@ - fnegd\t%0, %0 - #" - "&& reload_completed - && sparc_absnegfloat_split_legitimate (operands[0], operands[1])" - [(set (match_dup 2) (neg:DF (match_dup 3))) - (set (match_dup 4) (match_dup 5))] - "operands[2] = gen_rtx_raw_REG (DFmode, REGNO (operands[0])); - operands[3] = gen_rtx_raw_REG (DFmode, REGNO (operands[1])); - operands[4] = gen_rtx_raw_REG (DFmode, REGNO (operands[0]) + 2); - operands[5] = gen_rtx_raw_REG (DFmode, REGNO (operands[1]) + 2);" - [(set_attr "type" "fpmove,*") - (set_attr "length" "*,2") - (set_attr "fptype" "double")]) +(define_insn "*negtf2_hq" + [(set (match_operand:TF 0 "register_operand" "=e") + (neg:TF (match_operand:TF 1 "register_operand" "e")))] + "TARGET_FPU && TARGET_HARD_QUAD" + "fnegq\t%1, %0" + [(set_attr "type" "fpmove")]) + +(define_insn_and_split "*negtf2" + [(set (match_operand:TF 0 "register_operand" "=e") + (neg:TF (match_operand:TF 1 "register_operand" "e")))] + "TARGET_FPU && !TARGET_HARD_QUAD" + "#" + "&& reload_completed" + [(clobber (const_int 0))] +{ + rtx set_dest = operands[0]; + rtx set_src = operands[1]; + rtx dest1, dest2; + rtx src1, src2; + + dest1 = gen_df_reg (set_dest, 0); + dest2 = gen_df_reg (set_dest, 1); + src1 = gen_df_reg (set_src, 0); + src2 = gen_df_reg (set_src, 1); + + /* Now emit using the real source and destination we found, swapping + the order if we detect overlap. */ + if (reg_overlap_mentioned_p (dest1, src2)) + { + emit_insn (gen_movdf (dest2, src2)); + emit_insn (gen_negdf2 (dest1, src1)); + } + else + { + emit_insn (gen_negdf2 (dest1, src1)); + if (REGNO (dest2) != REGNO (src2)) + emit_insn (gen_movdf (dest2, src2)); + } + DONE; +} + [(set_attr "length" "2")]) (define_expand "negdf2" [(set (match_operand:DF 0 "register_operand" "") @@ -5609,22 +5615,39 @@ "") (define_insn_and_split "*negdf2_notv9" - [(set (match_operand:DF 0 "register_operand" "=e,e") - (neg:DF (match_operand:DF 1 "register_operand" "0,e")))] - "TARGET_FPU && ! TARGET_V9" - "@ - fnegs\t%0, %0 - #" - "&& reload_completed - && sparc_absnegfloat_split_legitimate (operands[0], operands[1])" - [(set (match_dup 2) (neg:SF (match_dup 3))) - (set (match_dup 4) (match_dup 5))] - "operands[2] = gen_rtx_raw_REG (SFmode, REGNO (operands[0])); - operands[3] = gen_rtx_raw_REG (SFmode, REGNO (operands[1])); - operands[4] = gen_rtx_raw_REG (SFmode, REGNO (operands[0]) + 1); - operands[5] = gen_rtx_raw_REG (SFmode, REGNO (operands[1]) + 1);" - [(set_attr "type" "fpmove,*") - (set_attr "length" "*,2")]) + [(set (match_operand:DF 0 "register_operand" "=e") + (neg:DF (match_operand:DF 1 "register_operand" "e")))] + "TARGET_FPU && !TARGET_V9" + "#" + "&& reload_completed" + [(clobber (const_int 0))] +{ + rtx set_dest = operands[0]; + rtx set_src = operands[1]; + rtx dest1, dest2; + rtx src1, src2; + + dest1 = gen_highpart (SFmode, set_dest); + dest2 = gen_lowpart (SFmode, set_dest); + src1 = gen_highpart (SFmode, set_src); + src2 = gen_lowpart (SFmode, set_src); + + /* Now emit using the real source and destination we found, swapping + the order if we detect overlap. */ + if (reg_overlap_mentioned_p (dest1, src2)) + { + emit_insn (gen_movsf (dest2, src2)); + emit_insn (gen_negsf2 (dest1, src1)); + } + else + { + emit_insn (gen_negsf2 (dest1, src1)); + if (REGNO (dest2) != REGNO (src2)) + emit_insn (gen_movsf (dest2, src2)); + } + DONE; +} + [(set_attr "length" "2")]) (define_insn "*negdf2_v9" [(set (match_operand:DF 0 "register_operand" "=e") @@ -5647,56 +5670,47 @@ "TARGET_FPU" "") -(define_insn_and_split "*abstf2_notv9" - [(set (match_operand:TF 0 "register_operand" "=e,e") - (abs:TF (match_operand:TF 1 "register_operand" "0,e")))] - ; We don't use quad float insns here so we don't need TARGET_HARD_QUAD. - "TARGET_FPU && ! TARGET_V9" - "@ - fabss\t%0, %0 - #" - "&& reload_completed - && sparc_absnegfloat_split_legitimate (operands[0], operands[1])" - [(set (match_dup 2) (abs:SF (match_dup 3))) - (set (match_dup 4) (match_dup 5)) - (set (match_dup 6) (match_dup 7))] - "operands[2] = gen_rtx_raw_REG (SFmode, REGNO (operands[0])); - operands[3] = gen_rtx_raw_REG (SFmode, REGNO (operands[1])); - operands[4] = gen_rtx_raw_REG (SFmode, REGNO (operands[0]) + 1); - operands[5] = gen_rtx_raw_REG (SFmode, REGNO (operands[1]) + 1); - operands[6] = gen_rtx_raw_REG (DFmode, REGNO (operands[0]) + 2); - operands[7] = gen_rtx_raw_REG (DFmode, REGNO (operands[1]) + 2);" - [(set_attr "type" "fpmove,*") - (set_attr "length" "*,2")]) - -(define_insn "*abstf2_hq_v9" - [(set (match_operand:TF 0 "register_operand" "=e,e") - (abs:TF (match_operand:TF 1 "register_operand" "0,e")))] - "TARGET_FPU && TARGET_V9 && TARGET_HARD_QUAD" - "@ - fabsd\t%0, %0 - fabsq\t%1, %0" - [(set_attr "type" "fpmove") - (set_attr "fptype" "double,*")]) +(define_insn "*abstf2_hq" + [(set (match_operand:TF 0 "register_operand" "=e") + (abs:TF (match_operand:TF 1 "register_operand" "e")))] + "TARGET_FPU && TARGET_HARD_QUAD" + "fabsq\t%1, %0" + [(set_attr "type" "fpmove")]) -(define_insn_and_split "*abstf2_v9" - [(set (match_operand:TF 0 "register_operand" "=e,e") - (abs:TF (match_operand:TF 1 "register_operand" "0,e")))] - "TARGET_FPU && TARGET_V9 && !TARGET_HARD_QUAD" - "@ - fabsd\t%0, %0 - #" - "&& reload_completed - && sparc_absnegfloat_split_legitimate (operands[0], operands[1])" - [(set (match_dup 2) (abs:DF (match_dup 3))) - (set (match_dup 4) (match_dup 5))] - "operands[2] = gen_rtx_raw_REG (DFmode, REGNO (operands[0])); - operands[3] = gen_rtx_raw_REG (DFmode, REGNO (operands[1])); - operands[4] = gen_rtx_raw_REG (DFmode, REGNO (operands[0]) + 2); - operands[5] = gen_rtx_raw_REG (DFmode, REGNO (operands[1]) + 2);" - [(set_attr "type" "fpmove,*") - (set_attr "length" "*,2") - (set_attr "fptype" "double,*")]) +(define_insn_and_split "*abstf2" + [(set (match_operand:TF 0 "register_operand" "=e") + (abs:TF (match_operand:TF 1 "register_operand" "e")))] + "TARGET_FPU && !TARGET_HARD_QUAD" + "#" + "&& reload_completed" + [(clobber (const_int 0))] +{ + rtx set_dest = operands[0]; + rtx set_src = operands[1]; + rtx dest1, dest2; + rtx src1, src2; + + dest1 = gen_df_reg (set_dest, 0); + dest2 = gen_df_reg (set_dest, 1); + src1 = gen_df_reg (set_src, 0); + src2 = gen_df_reg (set_src, 1); + + /* Now emit using the real source and destination we found, swapping + the order if we detect overlap. */ + if (reg_overlap_mentioned_p (dest1, src2)) + { + emit_insn (gen_movdf (dest2, src2)); + emit_insn (gen_absdf2 (dest1, src1)); + } + else + { + emit_insn (gen_absdf2 (dest1, src1)); + if (REGNO (dest2) != REGNO (src2)) + emit_insn (gen_movdf (dest2, src2)); + } + DONE; +} + [(set_attr "length" "2")]) (define_expand "absdf2" [(set (match_operand:DF 0 "register_operand" "") @@ -5705,22 +5719,39 @@ "") (define_insn_and_split "*absdf2_notv9" - [(set (match_operand:DF 0 "register_operand" "=e,e") - (abs:DF (match_operand:DF 1 "register_operand" "0,e")))] - "TARGET_FPU && ! TARGET_V9" - "@ - fabss\t%0, %0 - #" - "&& reload_completed - && sparc_absnegfloat_split_legitimate (operands[0], operands[1])" - [(set (match_dup 2) (abs:SF (match_dup 3))) - (set (match_dup 4) (match_dup 5))] - "operands[2] = gen_rtx_raw_REG (SFmode, REGNO (operands[0])); - operands[3] = gen_rtx_raw_REG (SFmode, REGNO (operands[1])); - operands[4] = gen_rtx_raw_REG (SFmode, REGNO (operands[0]) + 1); - operands[5] = gen_rtx_raw_REG (SFmode, REGNO (operands[1]) + 1);" - [(set_attr "type" "fpmove,*") - (set_attr "length" "*,2")]) + [(set (match_operand:DF 0 "register_operand" "=e") + (abs:DF (match_operand:DF 1 "register_operand" "e")))] + "TARGET_FPU && !TARGET_V9" + "#" + "&& reload_completed" + [(clobber (const_int 0))] +{ + rtx set_dest = operands[0]; + rtx set_src = operands[1]; + rtx dest1, dest2; + rtx src1, src2; + + dest1 = gen_highpart (SFmode, set_dest); + dest2 = gen_lowpart (SFmode, set_dest); + src1 = gen_highpart (SFmode, set_src); + src2 = gen_lowpart (SFmode, set_src); + + /* Now emit using the real source and destination we found, swapping + the order if we detect overlap. */ + if (reg_overlap_mentioned_p (dest1, src2)) + { + emit_insn (gen_movsf (dest2, src2)); + emit_insn (gen_abssf2 (dest1, src1)); + } + else + { + emit_insn (gen_abssf2 (dest1, src1)); + if (REGNO (dest2) != REGNO (src2)) + emit_insn (gen_movsf (dest2, src2)); + } + DONE; +} + [(set_attr "length" "2")]) (define_insn "*absdf2_v9" [(set (match_operand:DF 0 "register_operand" "=e") diff --git a/gcc/config/t-sol2 b/gcc/config/t-sol2 index a4c4af4..25feb04 100644 --- a/gcc/config/t-sol2 +++ b/gcc/config/t-sol2 @@ -35,3 +35,10 @@ sol2-stubs.o: $(srcdir)/config/sol2-stubs.c sol2.o: $(srcdir)/config/sol2.c $(COMPILE) $< $(POSTCOMPILE) + +# Install clearcap.map if present. +install: install-clearcap-map + +# Ignore failures: file only exists if linker supports it. +install-clearcap-map: + -$(INSTALL_DATA) clearcap.map $(DESTDIR)$(libdir) diff --git a/gcc/config/v850/rtems.h b/gcc/config/v850/rtems.h index 01dff3e..42ebb9f 100644 --- a/gcc/config/v850/rtems.h +++ b/gcc/config/v850/rtems.h @@ -13,8 +13,13 @@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* Specify predefined symbols in preprocessor. */ diff --git a/gcc/config/v850/v850-opts.h b/gcc/config/v850/v850-opts.h index a91b1b0..c3d9b7a 100644 --- a/gcc/config/v850/v850-opts.h +++ b/gcc/config/v850/v850-opts.h @@ -13,8 +13,13 @@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ #ifndef V850_OPTS_H diff --git a/gcc/config/v850/v850.h b/gcc/config/v850/v850.h index 92db20a..6ccdc5d 100644 --- a/gcc/config/v850/v850.h +++ b/gcc/config/v850/v850.h @@ -14,8 +14,13 @@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ #ifndef GCC_V850_H diff --git a/gcc/configure b/gcc/configure index 9238e8a..40b7bca 100755 --- a/gcc/configure +++ b/gcc/configure @@ -27057,6 +27057,34 @@ _ACEOF fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking linker mapfile support for clearing hardware capabilities" >&5 +$as_echo_n "checking linker mapfile support for clearing hardware capabilities... " >&6; } +saved_LDFLAGS="$LDFLAGS" +for clearcap_map in sol2-clearcapv2.map sol2-clearcap.map; do + LDFLAGS="$saved_LDFLAGS -Wl,-M,${srcdir}/config/$clearcap_map" + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +int main(void) {return 0;} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + gcc_cv_ld_clearcap=yes; break +else + gcc_cv_ld_clearcap=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +done +LDFLAGS="$saved_LDFLAGS" +if test "x$gcc_cv_ld_clearcap" = xyes; then + +$as_echo "#define HAVE_LD_CLEARCAP 1" >>confdefs.h + + ac_config_links="$ac_config_links clearcap.map:${srcdir}/config/$clearcap_map" + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_ld_clearcap" >&5 +$as_echo "$gcc_cv_ld_clearcap" >&6; } + case "$target:$tm_file" in powerpc64-*-freebsd* | powerpc64*-*-linux* | powerpc*-*-linux*rs6000/biarch64.h*) case "$target" in @@ -28586,6 +28614,7 @@ cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 # Files that config.status was made for. config_files="$ac_config_files" config_headers="$ac_config_headers" +config_links="$ac_config_links" config_commands="$ac_config_commands" _ACEOF @@ -28615,6 +28644,9 @@ $config_files Configuration headers: $config_headers +Configuration links: +$config_links + Configuration commands: $config_commands @@ -28750,6 +28782,7 @@ do "as") CONFIG_FILES="$CONFIG_FILES as:exec-tool.in" ;; "collect-ld") CONFIG_FILES="$CONFIG_FILES collect-ld:exec-tool.in" ;; "nm") CONFIG_FILES="$CONFIG_FILES nm:exec-tool.in" ;; + "clearcap.map") CONFIG_LINKS="$CONFIG_LINKS clearcap.map:${srcdir}/config/$clearcap_map" ;; "$all_outputs") CONFIG_FILES="$CONFIG_FILES $all_outputs" ;; "default") CONFIG_COMMANDS="$CONFIG_COMMANDS default" ;; @@ -28765,6 +28798,7 @@ done if $ac_need_defaults; then test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers + test "${CONFIG_LINKS+set}" = set || CONFIG_LINKS=$config_links test "${CONFIG_COMMANDS+set}" = set || CONFIG_COMMANDS=$config_commands fi @@ -29086,7 +29120,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 fi # test -n "$CONFIG_HEADERS" -eval set X " :F $CONFIG_FILES :H $CONFIG_HEADERS :C $CONFIG_COMMANDS" +eval set X " :F $CONFIG_FILES :H $CONFIG_HEADERS :L $CONFIG_LINKS :C $CONFIG_COMMANDS" shift for ac_tag do @@ -29322,7 +29356,38 @@ $as_echo "$as_me: $ac_file is unchanged" >&6;} || as_fn_error "could not create -" "$LINENO" 5 fi ;; + :L) + # + # CONFIG_LINK + # + + if test "$ac_source" = "$ac_file" && test "$srcdir" = '.'; then + : + else + # Prefer the file from the source tree if names are identical. + if test "$ac_source" = "$ac_file" || test ! -r "$ac_source"; then + ac_source=$srcdir/$ac_source + fi + { $as_echo "$as_me:${as_lineno-$LINENO}: linking $ac_source to $ac_file" >&5 +$as_echo "$as_me: linking $ac_source to $ac_file" >&6;} + + if test ! -r "$ac_source"; then + as_fn_error "$ac_source: file not found" "$LINENO" 5 + fi + rm -f "$ac_file" + + # Try a relative symlink, then a hard link, then a copy. + case $srcdir in + [\\/$]* | ?:[\\/]* ) ac_rel_source=$ac_source ;; + *) ac_rel_source=$ac_top_build_prefix$ac_source ;; + esac + ln -s "$ac_rel_source" "$ac_file" 2>/dev/null || + ln "$ac_source" "$ac_file" 2>/dev/null || + cp -p "$ac_source" "$ac_file" || + as_fn_error "cannot link or copy $ac_source to $ac_file" "$LINENO" 5 + fi + ;; :C) { $as_echo "$as_me:${as_lineno-$LINENO}: executing $ac_file commands" >&5 $as_echo "$as_me: executing $ac_file commands" >&6;} ;; diff --git a/gcc/configure.ac b/gcc/configure.ac index 6824f0c..96ea082 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -4806,6 +4806,21 @@ if test x"$gcc_cv_ld_as_needed" = xyes; then [Define to the linker option to keep unused dependencies.]) fi +AC_MSG_CHECKING(linker mapfile support for clearing hardware capabilities) +saved_LDFLAGS="$LDFLAGS" +for clearcap_map in sol2-clearcapv2.map sol2-clearcap.map; do + LDFLAGS="$saved_LDFLAGS -Wl,-M,${srcdir}/config/$clearcap_map" + AC_LINK_IFELSE([int main(void) {return 0;}], + [gcc_cv_ld_clearcap=yes; break], [gcc_cv_ld_clearcap=no]) +done +LDFLAGS="$saved_LDFLAGS" +if test "x$gcc_cv_ld_clearcap" = xyes; then + AC_DEFINE([HAVE_LD_CLEARCAP], 1, +[Define if the linker supports clearing hardware capabilities via mapfile.]) + AC_CONFIG_LINKS([clearcap.map:${srcdir}/config/$clearcap_map]) +fi +AC_MSG_RESULT($gcc_cv_ld_clearcap) + case "$target:$tm_file" in powerpc64-*-freebsd* | powerpc64*-*-linux* | powerpc*-*-linux*rs6000/biarch64.h*) case "$target" in diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 266547e..7aeede9 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,33 @@ +2014-05-21 Igor Zamyatin + + PR c/60189 + * parser.c (cp_parser_postfix_expression): Move handling of cilk_sync + from here to... + (cp_parser_statement): ...here. Make sure only semicolon can go after + Cilk_sync. + +2014-05-13 Jason Merrill + + PR c++/61151 + * lambda.c (is_this): Allow capture proxies too. + + DR 5 + PR c++/60019 + * call.c (build_user_type_conversion_1): The copy-init temporary + is cv-unqualified. + +2014-05-07 Paolo Carlini + + PR c++/61083 + * pt.c (convert_nontype_argument): Protect all the error calls + with complain & tf_error. + +2014-05-06 Paolo Carlini + + PR c++/60999 + * pt.c (maybe_begin_member_template_processing): Use + uses_template_parms. + 2014-05-02 Jason Merrill PR c++/60992 diff --git a/gcc/cp/call.c b/gcc/cp/call.c index ae0d4ff..39f910d 100644 --- a/gcc/cp/call.c +++ b/gcc/cp/call.c @@ -3677,11 +3677,20 @@ build_user_type_conversion_1 (tree totype, tree expr, int flags, return cand; } + tree convtype; + if (!DECL_CONSTRUCTOR_P (cand->fn)) + convtype = non_reference (TREE_TYPE (TREE_TYPE (cand->fn))); + else if (cand->second_conv->kind == ck_rvalue) + /* DR 5: [in the first step of copy-initialization]...if the function + is a constructor, the call initializes a temporary of the + cv-unqualified version of the destination type. */ + convtype = cv_unqualified (totype); + else + convtype = totype; /* Build the user conversion sequence. */ conv = build_conv (ck_user, - (DECL_CONSTRUCTOR_P (cand->fn) - ? totype : non_reference (TREE_TYPE (TREE_TYPE (cand->fn)))), + convtype, build_identity_conv (TREE_TYPE (expr), expr)); conv->cand = cand; if (cand->viable == -1) diff --git a/gcc/cp/lambda.c b/gcc/cp/lambda.c index 3280644..7bd0de1 100644 --- a/gcc/cp/lambda.c +++ b/gcc/cp/lambda.c @@ -204,7 +204,8 @@ lambda_function (tree lambda) static inline bool is_this (tree t) { - return (TREE_CODE (t) == PARM_DECL + return ((TREE_CODE (t) == PARM_DECL + || TREE_CODE (t) == VAR_DECL) && DECL_NAME (t) == this_identifier); } diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c index aa00a7b..06353ce 100644 --- a/gcc/cp/parser.c +++ b/gcc/cp/parser.c @@ -5835,20 +5835,6 @@ cp_parser_postfix_expression (cp_parser *parser, bool address_p, bool cast_p, } break; } - - case RID_CILK_SYNC: - if (flag_cilkplus) - { - tree sync_expr = build_cilk_sync (); - SET_EXPR_LOCATION (sync_expr, - cp_lexer_peek_token (parser->lexer)->location); - finish_expr_stmt (sync_expr); - } - else - error_at (token->location, "-fcilkplus must be enabled to use" - " %<_Cilk_sync%>"); - cp_lexer_consume_token (parser->lexer); - break; case RID_BUILTIN_SHUFFLE: { @@ -9400,6 +9386,24 @@ cp_parser_statement (cp_parser* parser, tree in_statement_expr, statement = cp_parser_jump_statement (parser); break; + case RID_CILK_SYNC: + cp_lexer_consume_token (parser->lexer); + if (flag_cilkplus) + { + tree sync_expr = build_cilk_sync (); + SET_EXPR_LOCATION (sync_expr, + token->location); + statement = finish_expr_stmt (sync_expr); + } + else + { + error_at (token->location, "-fcilkplus must be enabled to use" + " %<_Cilk_sync%>"); + statement = error_mark_node; + } + cp_parser_require (parser, CPP_SEMICOLON, RT_SEMICOLON); + break; + /* Objective-C++ exception-handling constructs. */ case RID_AT_TRY: case RID_AT_CATCH: diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c index 18389e0..3951997 100644 --- a/gcc/cp/pt.c +++ b/gcc/cp/pt.c @@ -462,9 +462,13 @@ maybe_begin_member_template_processing (tree decl) bool nsdmi = TREE_CODE (decl) == FIELD_DECL; if (nsdmi) - decl = (CLASSTYPE_TEMPLATE_INFO (DECL_CONTEXT (decl)) - ? CLASSTYPE_TI_TEMPLATE (DECL_CONTEXT (decl)) - : NULL_TREE); + { + tree ctx = DECL_CONTEXT (decl); + decl = (CLASSTYPE_TEMPLATE_INFO (ctx) + /* Disregard full specializations (c++/60999). */ + && uses_template_parms (ctx) + ? CLASSTYPE_TI_TEMPLATE (ctx) : NULL_TREE); + } if (inline_needs_template_parms (decl, nsdmi)) { @@ -5817,17 +5821,18 @@ convert_nontype_argument (tree type, tree expr, tsubst_flags_t complain) { if (VAR_P (expr)) { - error ("%qD is not a valid template argument " - "because %qD is a variable, not the address of " - "a variable", - expr, expr); + if (complain & tf_error) + error ("%qD is not a valid template argument " + "because %qD is a variable, not the address of " + "a variable", expr, expr); return NULL_TREE; } if (POINTER_TYPE_P (expr_type)) { - error ("%qE is not a valid template argument for %qT " - "because it is not the address of a variable", - expr, type); + if (complain & tf_error) + error ("%qE is not a valid template argument for %qT " + "because it is not the address of a variable", + expr, type); return NULL_TREE; } /* Other values, like integer constants, might be valid @@ -5842,23 +5847,24 @@ convert_nontype_argument (tree type, tree expr, tsubst_flags_t complain) ? TREE_OPERAND (expr, 0) : expr); if (!VAR_P (decl)) { - error ("%qE is not a valid template argument of type %qT " - "because %qE is not a variable", - expr, type, decl); + if (complain & tf_error) + error ("%qE is not a valid template argument of type %qT " + "because %qE is not a variable", expr, type, decl); return NULL_TREE; } else if (cxx_dialect < cxx11 && !DECL_EXTERNAL_LINKAGE_P (decl)) { - error ("%qE is not a valid template argument of type %qT " - "because %qD does not have external linkage", - expr, type, decl); + if (complain & tf_error) + error ("%qE is not a valid template argument of type %qT " + "because %qD does not have external linkage", + expr, type, decl); return NULL_TREE; } else if (cxx_dialect >= cxx11 && decl_linkage (decl) == lk_none) { - error ("%qE is not a valid template argument of type %qT " - "because %qD has no linkage", - expr, type, decl); + if (complain & tf_error) + error ("%qE is not a valid template argument of type %qT " + "because %qD has no linkage", expr, type, decl); return NULL_TREE; } } @@ -5886,15 +5892,17 @@ convert_nontype_argument (tree type, tree expr, tsubst_flags_t complain) if (!at_least_as_qualified_p (TREE_TYPE (type), expr_type)) { - error ("%qE is not a valid template argument for type %qT " - "because of conflicts in cv-qualification", expr, type); + if (complain & tf_error) + error ("%qE is not a valid template argument for type %qT " + "because of conflicts in cv-qualification", expr, type); return NULL_TREE; } if (!real_lvalue_p (expr)) { - error ("%qE is not a valid template argument for type %qT " - "because it is not an lvalue", expr, type); + if (complain & tf_error) + error ("%qE is not a valid template argument for type %qT " + "because it is not an lvalue", expr, type); return NULL_TREE; } @@ -5910,26 +5918,29 @@ convert_nontype_argument (tree type, tree expr, tsubst_flags_t complain) expr = TREE_OPERAND (expr, 0); if (DECL_P (expr)) { - error ("%q#D is not a valid template argument for type %qT " - "because a reference variable does not have a constant " - "address", expr, type); + if (complain & tf_error) + error ("%q#D is not a valid template argument for type %qT " + "because a reference variable does not have a constant " + "address", expr, type); return NULL_TREE; } } if (!DECL_P (expr)) { - error ("%qE is not a valid template argument for type %qT " - "because it is not an object with external linkage", - expr, type); + if (complain & tf_error) + error ("%qE is not a valid template argument for type %qT " + "because it is not an object with external linkage", + expr, type); return NULL_TREE; } if (!DECL_EXTERNAL_LINKAGE_P (expr)) { - error ("%qE is not a valid template argument for type %qT " - "because object %qD has not external linkage", - expr, type, expr); + if (complain & tf_error) + error ("%qE is not a valid template argument for type %qT " + "because object %qD has not external linkage", + expr, type, expr); return NULL_TREE; } @@ -5971,9 +5982,13 @@ convert_nontype_argument (tree type, tree expr, tsubst_flags_t complain) { if (TREE_CODE (expr) == ADDR_EXPR) { - error ("%qE is not a valid template argument for type %qT " - "because it is a pointer", expr, type); - inform (input_location, "try using %qE instead", TREE_OPERAND (expr, 0)); + if (complain & tf_error) + { + error ("%qE is not a valid template argument for type %qT " + "because it is a pointer", expr, type); + inform (input_location, "try using %qE instead", + TREE_OPERAND (expr, 0)); + } return NULL_TREE; } @@ -6011,13 +6026,16 @@ convert_nontype_argument (tree type, tree expr, tsubst_flags_t complain) provide a superior diagnostic. */ if (!same_type_p (TREE_TYPE (expr), type)) { - error ("%qE is not a valid template argument for type %qT " - "because it is of type %qT", expr, type, - TREE_TYPE (expr)); - /* If we are just one standard conversion off, explain. */ - if (can_convert_standard (type, TREE_TYPE (expr), complain)) - inform (input_location, - "standard conversions are not allowed in this context"); + if (complain & tf_error) + { + error ("%qE is not a valid template argument for type %qT " + "because it is of type %qT", expr, type, + TREE_TYPE (expr)); + /* If we are just one standard conversion off, explain. */ + if (can_convert_standard (type, TREE_TYPE (expr), complain)) + inform (input_location, + "standard conversions are not allowed in this context"); + } return NULL_TREE; } } @@ -6040,8 +6058,9 @@ convert_nontype_argument (tree type, tree expr, tsubst_flags_t complain) { if (expr != nullptr_node) { - error ("%qE is not a valid template argument for type %qT " - "because it is of type %qT", expr, type, TREE_TYPE (expr)); + if (complain & tf_error) + error ("%qE is not a valid template argument for type %qT " + "because it is of type %qT", expr, type, TREE_TYPE (expr)); return NULL_TREE; } return expr; diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 9780d92..23c7b49 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -376,6 +376,8 @@ goto *(&&foo + array[i]); This is more friendly to code living in shared libraries, as it reduces the number of dynamic relocations that are needed, and by consequence, allows the data to be read-only. +This alternative with label differences is not supported for the AVR target, +please use the first approach for AVR programs. The @code{&&foo} expressions for the same label might have different values if the containing function is inlined or cloned. If a program @@ -11335,7 +11337,7 @@ used. All of them generate the machine instruction that is part of the name. @smallexample -v32qi __builtin_ia32_mpsadbw256 (v32qi,v32qi,v32qi,int) +v32qi __builtin_ia32_mpsadbw256 (v32qi,v32qi,int) v32qi __builtin_ia32_pabsb256 (v32qi) v16hi __builtin_ia32_pabsw256 (v16hi) v8si __builtin_ia32_pabsd256 (v8si) @@ -11570,8 +11572,8 @@ The following built-in functions are available when @option{-mxop} is used. @smallexample v2df __builtin_ia32_vfrczpd (v2df) v4sf __builtin_ia32_vfrczps (v4sf) -v2df __builtin_ia32_vfrczsd (v2df, v2df) -v4sf __builtin_ia32_vfrczss (v4sf, v4sf) +v2df __builtin_ia32_vfrczsd (v2df) +v4sf __builtin_ia32_vfrczss (v4sf) v4df __builtin_ia32_vfrczpd256 (v4df) v8sf __builtin_ia32_vfrczps256 (v8sf) v2di __builtin_ia32_vpcmov (v2di, v2di, v2di) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 5b7ce1a..9d8ffc0 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -978,7 +978,7 @@ See RS/6000 and PowerPC Options. -mpretend-cmove -mtas} @emph{Solaris 2 Options} -@gccoptlist{-mimpure-text -mno-impure-text @gol +@gccoptlist{-mclear-hwcap -mno-clear-hwcap -mimpure-text -mno-impure-text @gol -pthreads -pthread} @emph{SPARC Options} @@ -7392,7 +7392,8 @@ Attempt to remove redundant extension instructions. This is especially helpful for the x86-64 architecture, which implicitly zero-extends in 64-bit registers after writing to their lower 32-bit half. -Enabled for AArch64 and x86 at levels @option{-O2}, @option{-O3}. +Enabled for Alpha, AArch64 and x86 at levels @option{-O2}, +@option{-O3}, @option{-Os}. @item -flive-range-shrinkage @opindex flive-range-shrinkage @@ -10003,6 +10004,28 @@ parameter in order to propagate them and perform devirtualization. @option{ipa-cp-value-list-size} is the maximum number of values and types it stores per one formal parameter of a function. +@item ipa-cp-eval-threshold +IPA-CP calculates its own score of cloning profitability heuristics +and performs those cloning opportunities with scores that exceed +@option{ipa-cp-eval-threshold}. + +@item ipa-max-agg-items +IPA-CP is also capable to propagate a number of scalar values passed +in an aggregate. @option{ipa-max-agg-items} controls the maximum +number of such values per one parameter. + +@item ipa-cp-loop-hint-bonus +When IPA-CP determines that a cloning candidate would make the number +of iterations of a loop known, it adds a bonus of +@option{ipa-cp-loop-hint-bonus} bonus to the profitability score of +the candidate. + +@item ipa-cp-array-index-hint-bonus +When IPA-CP determines that a cloning candidate would make the index of +an array access known, it adds a bonus of +@option{ipa-cp-array-index-hint-bonus} bonus to the profitability +score of the candidate. + @item lto-partitions Specify desired number of partitions produced during WHOPR compilation. The number of partitions should exceed the number of CPUs used for compilation. @@ -20808,6 +20831,13 @@ patterns. This can result in faster code on the SH4 processor. These @samp{-m} options are supported on Solaris 2: @table @gcctabopt +@item -mclear-hwcap +@opindex mclear-hwcap +@option{-mclear-hwcap} tells the compiler to remove the hardware +capabilities generated by the Solaris assembler. This is only necessary +when object files use ISA extensions not supported by the current +machine, but check at runtime whether or not to use them. + @item -mimpure-text @opindex mimpure-text @option{-mimpure-text}, used in addition to @option{-shared}, tells diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 9148608..7438980 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1601,6 +1601,13 @@ MIPS target supports @code{-mpaired-single}. @subsubsection PowerPC-specific attributes @table @code + +@item dfp_hw +PowerPC target supports executing hardware DFP instructions. + +@item p8vector_hw +PowerPC target supports executing VSX instructions (ISA 2.07). + @item powerpc64 Test system supports executing 64-bit instructions. @@ -1610,12 +1617,24 @@ PowerPC target supports AltiVec. @item powerpc_altivec_ok PowerPC target supports @code{-maltivec}. +@item powerpc_eabi_ok +PowerPC target supports @code{-meabi}. + +@item powerpc_elfv2 +PowerPC target supports @code{-mabi=elfv2}. + @item powerpc_fprs PowerPC target supports floating-point registers. @item powerpc_hard_double PowerPC target supports hardware double-precision floating-point. +@item powerpc_htm_ok +PowerPC target supports @code{-mhtm} + +@item powerpc_p8vector_ok +PowerPC target supports @code{-mpower8-vector} + @item powerpc_ppu_ok PowerPC target supports @code{-mcpu=cell}. @@ -1629,9 +1648,6 @@ PowerPC target supports PowerPC SPE. @item powerpc_spu PowerPC target supports PowerPC SPU. -@item spu_auto_overlay -SPU target has toolchain that supports automatic overlay generation. - @item powerpc_vsx_ok PowerPC target supports @code{-mvsx}. @@ -1639,8 +1655,17 @@ PowerPC target supports @code{-mvsx}. Including the options used to compile this particular test, the PowerPC target supports PowerPC 405. +@item ppc_recip_hw +PowerPC target supports executing reciprocal estimate instructions. + +@item spu_auto_overlay +SPU target has toolchain that supports automatic overlay generation. + @item vmx_hw PowerPC target supports executing AltiVec instructions. + +@item vsx_hw +PowerPC target supports executing VSX instructions (ISA 2.06). @end table @subsubsection Other hardware attributes diff --git a/gcc/double-int.c b/gcc/double-int.c index 454655d..f6e340b 100644 --- a/gcc/double-int.c +++ b/gcc/double-int.c @@ -588,7 +588,7 @@ div_and_round_double (unsigned code, int uns, == (unsigned HOST_WIDE_INT) htwice) && (labs_den <= ltwice))) { - if (*hquo < 0) + if (quo_neg) /* quo = quo - 1; */ add_double (*lquo, *hquo, (HOST_WIDE_INT) -1, (HOST_WIDE_INT) -1, lquo, hquo); diff --git a/gcc/fold-const.c b/gcc/fold-const.c index 5c2bf25..802c021 100644 --- a/gcc/fold-const.c +++ b/gcc/fold-const.c @@ -9308,7 +9308,7 @@ fold_comparison (location_t loc, enum tree_code code, tree type, /* Transform comparisons of the form X +- C1 CMP Y +- C2 to X CMP Y +- C2 +- C1 for signed X, Y. This is valid if the resulting offset is smaller in absolute value than the - original one. */ + original one and has the same sign. */ if (TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (arg0)) && (TREE_CODE (arg0) == PLUS_EXPR || TREE_CODE (arg0) == MINUS_EXPR) && (TREE_CODE (TREE_OPERAND (arg0, 1)) == INTEGER_CST @@ -9327,32 +9327,35 @@ fold_comparison (location_t loc, enum tree_code code, tree type, "a comparison"); /* Put the constant on the side where it doesn't overflow and is - of lower absolute value than before. */ + of lower absolute value and of same sign than before. */ cst = int_const_binop (TREE_CODE (arg0) == TREE_CODE (arg1) ? MINUS_EXPR : PLUS_EXPR, const2, const1); if (!TREE_OVERFLOW (cst) - && tree_int_cst_compare (const2, cst) == tree_int_cst_sgn (const2)) + && tree_int_cst_compare (const2, cst) == tree_int_cst_sgn (const2) + && tree_int_cst_sgn (cst) == tree_int_cst_sgn (const2)) { fold_overflow_warning (warnmsg, WARN_STRICT_OVERFLOW_COMPARISON); return fold_build2_loc (loc, code, type, - variable1, - fold_build2_loc (loc, - TREE_CODE (arg1), TREE_TYPE (arg1), - variable2, cst)); + variable1, + fold_build2_loc (loc, TREE_CODE (arg1), + TREE_TYPE (arg1), + variable2, cst)); } cst = int_const_binop (TREE_CODE (arg0) == TREE_CODE (arg1) ? MINUS_EXPR : PLUS_EXPR, const1, const2); if (!TREE_OVERFLOW (cst) - && tree_int_cst_compare (const1, cst) == tree_int_cst_sgn (const1)) + && tree_int_cst_compare (const1, cst) == tree_int_cst_sgn (const1) + && tree_int_cst_sgn (cst) == tree_int_cst_sgn (const1)) { fold_overflow_warning (warnmsg, WARN_STRICT_OVERFLOW_COMPARISON); return fold_build2_loc (loc, code, type, - fold_build2_loc (loc, TREE_CODE (arg0), TREE_TYPE (arg0), - variable1, cst), - variable2); + fold_build2_loc (loc, TREE_CODE (arg0), + TREE_TYPE (arg0), + variable1, cst), + variable2); } } @@ -11426,7 +11429,6 @@ fold_binary_loc (location_t loc, { double_int c1, c2, c3, msk; int width = TYPE_PRECISION (type), w; - bool try_simplify = true; c1 = tree_to_double_int (TREE_OPERAND (arg0, 1)); c2 = tree_to_double_int (arg1); @@ -11463,20 +11465,7 @@ fold_binary_loc (location_t loc, } } - /* If X is a tree of the form (Y * K1) & K2, this might conflict - with that optimization from the BIT_AND_EXPR optimizations. - This could end up in an infinite recursion. */ - if (TREE_CODE (TREE_OPERAND (arg0, 0)) == MULT_EXPR - && TREE_CODE (TREE_OPERAND (TREE_OPERAND (arg0, 0), 1)) - == INTEGER_CST) - { - tree t = TREE_OPERAND (TREE_OPERAND (arg0, 0), 1); - double_int masked = mask_with_tz (type, c3, tree_to_double_int (t)); - - try_simplify = (masked != c1); - } - - if (try_simplify && c3 != c1) + if (c3 != c1) return fold_build2_loc (loc, BIT_IOR_EXPR, type, fold_build2_loc (loc, BIT_AND_EXPR, type, TREE_OPERAND (arg0, 0), @@ -11866,16 +11855,25 @@ fold_binary_loc (location_t loc, && TREE_CODE (arg0) == MULT_EXPR && TREE_CODE (TREE_OPERAND (arg0, 1)) == INTEGER_CST) { + double_int darg1 = tree_to_double_int (arg1); double_int masked - = mask_with_tz (type, tree_to_double_int (arg1), + = mask_with_tz (type, darg1, tree_to_double_int (TREE_OPERAND (arg0, 1))); if (masked.is_zero ()) return omit_two_operands_loc (loc, type, build_zero_cst (type), arg0, arg1); - else if (masked != tree_to_double_int (arg1)) - return fold_build2_loc (loc, code, type, op0, - double_int_to_tree (type, masked)); + else if (masked != darg1) + { + /* Avoid the transform if arg1 is a mask of some + mode which allows further optimizations. */ + int pop = darg1.popcount (); + if (!(pop >= BITS_PER_UNIT + && exact_log2 (pop) != -1 + && double_int::mask (pop) == darg1)) + return fold_build2_loc (loc, code, type, op0, + double_int_to_tree (type, masked)); + } } /* For constants M and N, if M == (1LL << cst) - 1 && (N & M) == M, @@ -12088,11 +12086,17 @@ fold_binary_loc (location_t loc, /* See if we can shorten the right shift. */ if (shiftc < prec) shift_type = inner_type; + /* Otherwise X >> C1 is all zeros, so we'll optimize + it into (X, 0) later on by making sure zerobits + is all ones. */ } } zerobits = ~(unsigned HOST_WIDE_INT) 0; - zerobits >>= HOST_BITS_PER_WIDE_INT - shiftc; - zerobits <<= prec - shiftc; + if (shiftc < prec) + { + zerobits >>= HOST_BITS_PER_WIDE_INT - shiftc; + zerobits <<= prec - shiftc; + } /* For arithmetic shift if sign bit could be set, zerobits can contain actually sign bits, so no transformation is possible, unless MASK masks them all away. In that @@ -12110,7 +12114,7 @@ fold_binary_loc (location_t loc, /* ((X << 16) & 0xff00) is (X, 0). */ if ((mask & zerobits) == mask) return omit_one_operand_loc (loc, type, - build_int_cst (type, 0), arg0); + build_int_cst (type, 0), arg0); newmask = mask | zerobits; if (newmask != mask && (newmask & (newmask + 1)) == 0) diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 42f0321..15da2d6 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,20 @@ +2014-05-29 Thomas Koenig + + PR fortran/60834 + Backport from mainline + * frontend-passes.c (in_assoc_list): New variable. + (optimize_namespace): Initialize in_assoc_list + (combine_array_constructor): Don't try to combine + assoc lists. + (gfc_code_walker): Keep track of in_assoc_list. + +2014-05-26 Janne Blomqvist + + Backport from mainline + PR libfortran/61310 + * intrinsics.texi (CTIME): Remove mention of locale-dependent + behavior. + 2014-04-22 Tobias Burnus Backport from mainline diff --git a/gcc/fortran/frontend-passes.c b/gcc/fortran/frontend-passes.c index 6c67e66..9ceca95 100644 --- a/gcc/fortran/frontend-passes.c +++ b/gcc/fortran/frontend-passes.c @@ -88,6 +88,10 @@ static int doloop_size, doloop_level; struct my_struct *evec; +/* Keep track of association lists. */ + +static bool in_assoc_list; + /* Entry point - run all passes for a namespace. */ void @@ -820,6 +824,7 @@ optimize_namespace (gfc_namespace *ns) current_ns = ns; forall_level = 0; iterator_level = 0; + in_assoc_list = false; in_omp_workshare = false; gfc_code_walker (&ns->code, convert_do_while, dummy_expr_callback, NULL); @@ -1054,6 +1059,11 @@ combine_array_constructor (gfc_expr *e) if (e->rank != 1) return false; + /* Don't try to combine association lists, this makes no sense + and leads to an ICE. */ + if (in_assoc_list) + return false; + op1 = e->value.op.op1; op2 = e->value.op.op2; @@ -1940,8 +1950,17 @@ gfc_code_walker (gfc_code **c, walk_code_fn_t codefn, walk_expr_fn_t exprfn, case EXEC_BLOCK: WALK_SUBCODE (co->ext.block.ns->code); - for (alist = co->ext.block.assoc; alist; alist = alist->next) - WALK_SUBEXPR (alist->target); + if (co->ext.block.assoc) + { + bool saved_in_assoc_list = in_assoc_list; + + in_assoc_list = true; + for (alist = co->ext.block.assoc; alist; alist = alist->next) + WALK_SUBEXPR (alist->target); + + in_assoc_list = saved_in_assoc_list; + } + break; case EXEC_DO: diff --git a/gcc/fortran/intrinsic.texi b/gcc/fortran/intrinsic.texi index 926ffe9..efbb2f1 100644 --- a/gcc/fortran/intrinsic.texi +++ b/gcc/fortran/intrinsic.texi @@ -3343,10 +3343,8 @@ end program test_cshift @table @asis @item @emph{Description}: @code{CTIME} converts a system time value, such as returned by -@code{TIME8}, to a string. Unless the application has called -@code{setlocale}, the output will be in the default locale, of length -24 and of the form @samp{Sat Aug 19 18:13:14 1995}. In other locales, -a longer string may result. +@code{TIME8}, to a string. The output will be of the form @samp{Sat +Aug 19 18:13:14 1995}. This intrinsic is provided in both subroutine and function forms; however, only one form can be used in any given program unit. diff --git a/gcc/go/gofrontend/types.cc b/gcc/go/gofrontend/types.cc index 2148a1a..e79adb3 100644 --- a/gcc/go/gofrontend/types.cc +++ b/gcc/go/gofrontend/types.cc @@ -8966,9 +8966,8 @@ Type::finalize_methods(Gogo* gogo, const Type* type, Location location, Methods** all_methods) { *all_methods = NULL; - Types_seen types_seen; - Type::add_methods_for_type(type, NULL, 0, false, false, &types_seen, - all_methods); + std::vector seen; + Type::add_methods_for_type(type, NULL, 0, false, false, &seen, all_methods); Type::build_stub_methods(gogo, type, *all_methods, location); } @@ -8986,7 +8985,7 @@ Type::add_methods_for_type(const Type* type, unsigned int depth, bool is_embedded_pointer, bool needs_stub_method, - Types_seen* types_seen, + std::vector* seen, Methods** methods) { // Pointer types may not have methods. @@ -8996,19 +8995,24 @@ Type::add_methods_for_type(const Type* type, const Named_type* nt = type->named_type(); if (nt != NULL) { - std::pair ins = types_seen->insert(nt); - if (!ins.second) - return; - } + for (std::vector::const_iterator p = seen->begin(); + p != seen->end(); + ++p) + { + if (*p == nt) + return; + } - if (nt != NULL) - Type::add_local_methods_for_type(nt, field_indexes, depth, - is_embedded_pointer, needs_stub_method, - methods); + seen->push_back(nt); + + Type::add_local_methods_for_type(nt, field_indexes, depth, + is_embedded_pointer, needs_stub_method, + methods); + } Type::add_embedded_methods_for_type(type, field_indexes, depth, is_embedded_pointer, needs_stub_method, - types_seen, methods); + seen, methods); // If we are called with depth > 0, then we are looking at an // anonymous field of a struct. If such a field has interface type, @@ -9017,6 +9021,9 @@ Type::add_methods_for_type(const Type* type, // following the usual rules for an interface type. if (depth > 0) Type::add_interface_methods_for_type(type, field_indexes, depth, methods); + + if (nt != NULL) + seen->pop_back(); } // Add the local methods for the named type NT to *METHODS. The @@ -9062,7 +9069,7 @@ Type::add_embedded_methods_for_type(const Type* type, unsigned int depth, bool is_embedded_pointer, bool needs_stub_method, - Types_seen* types_seen, + std::vector* seen, Methods** methods) { // Look for anonymous fields in TYPE. TYPE has fields if it is a @@ -9106,7 +9113,7 @@ Type::add_embedded_methods_for_type(const Type* type, (needs_stub_method || is_pointer || i > 0), - types_seen, + seen, methods); } } diff --git a/gcc/go/gofrontend/types.h b/gcc/go/gofrontend/types.h index 5fda4e7..acb06ca 100644 --- a/gcc/go/gofrontend/types.h +++ b/gcc/go/gofrontend/types.h @@ -1171,14 +1171,11 @@ class Type static tree build_receive_return_type(tree type); - // A hash table we use to avoid infinite recursion. - typedef Unordered_set_hash(const Named_type*, Type_hash_identical, - Type_identical) Types_seen; - // Add all methods for TYPE to the list of methods for THIS. static void add_methods_for_type(const Type* type, const Method::Field_indexes*, - unsigned int depth, bool, bool, Types_seen*, + unsigned int depth, bool, bool, + std::vector*, Methods**); static void @@ -1189,7 +1186,8 @@ class Type static void add_embedded_methods_for_type(const Type* type, const Method::Field_indexes*, - unsigned int depth, bool, bool, Types_seen*, + unsigned int depth, bool, bool, + std::vector*, Methods**); static void diff --git a/gcc/graphite-scop-detection.c b/gcc/graphite-scop-detection.c index 821f084..635e21a 100644 --- a/gcc/graphite-scop-detection.c +++ b/gcc/graphite-scop-detection.c @@ -474,8 +474,10 @@ scopdet_basic_block_info (basic_block bb, loop_p outermost_loop, result.exits = false; /* Mark bbs terminating a SESE region difficult, if they start - a condition. */ - if (!single_succ_p (bb)) + a condition or if the block it exits to cannot be split + with make_forwarder_block. */ + if (!single_succ_p (bb) + || bb_has_abnormal_pred (single_succ (bb))) result.difficult = true; else result.exit = single_succ (bb); diff --git a/gcc/ipa-devirt.c b/gcc/ipa-devirt.c index 03a6c5b..7f07d2f 100644 --- a/gcc/ipa-devirt.c +++ b/gcc/ipa-devirt.c @@ -987,6 +987,17 @@ give_up: context->outer_type = expected_type; context->offset = 0; context->maybe_derived_type = true; + context->maybe_in_construction = true; + /* POD can be changed to an instance of a polymorphic type by + placement new. Here we play safe and assume that any + non-polymorphic type is POD. */ + if ((TREE_CODE (type) != RECORD_TYPE + || !TYPE_BINFO (type) + || !polymorphic_type_binfo_p (TYPE_BINFO (type))) + && (TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST + || (offset + tree_to_uhwi (TYPE_SIZE (expected_type)) <= + tree_to_uhwi (TYPE_SIZE (type))))) + return true; return false; } diff --git a/gcc/ipa-inline-transform.c b/gcc/ipa-inline-transform.c index a45aab1..6f68631 100644 --- a/gcc/ipa-inline-transform.c +++ b/gcc/ipa-inline-transform.c @@ -214,6 +214,7 @@ clone_inlined_nodes (struct cgraph_edge *e, bool duplicate, it is NULL. If UPDATE_OVERALL_SUMMARY is false, do not bother to recompute overall size of caller after inlining. Caller is required to eventually do it via inline_update_overall_summary. + If callee_removed is non-NULL, set it to true if we removed callee node. Return true iff any new callgraph edges were discovered as a result of inlining. */ @@ -221,7 +222,8 @@ clone_inlined_nodes (struct cgraph_edge *e, bool duplicate, bool inline_call (struct cgraph_edge *e, bool update_original, vec *new_edges, - int *overall_size, bool update_overall_summary) + int *overall_size, bool update_overall_summary, + bool *callee_removed) { int old_size = 0, new_size = 0; struct cgraph_node *to = NULL; @@ -260,6 +262,8 @@ inline_call (struct cgraph_edge *e, bool update_original, { next_alias = cgraph_alias_target (alias); cgraph_remove_node (alias); + if (callee_removed) + *callee_removed = true; alias = next_alias; } else diff --git a/gcc/ipa-inline.c b/gcc/ipa-inline.c index 4051819..dab3adf 100644 --- a/gcc/ipa-inline.c +++ b/gcc/ipa-inline.c @@ -1961,6 +1961,8 @@ static bool inline_to_all_callers (struct cgraph_node *node, void *data) { int *num_calls = (int *)data; + bool callee_removed = false; + while (node->callers && !node->global.inlined_to) { struct cgraph_node *caller = node->callers->caller; @@ -1977,7 +1979,7 @@ inline_to_all_callers (struct cgraph_node *node, void *data) inline_summary (node->callers->caller)->size); } - inline_call (node->callers, true, NULL, NULL, true); + inline_call (node->callers, true, NULL, NULL, true, &callee_removed); if (dump_file) fprintf (dump_file, " Inlined into %s which now has %i size\n", @@ -1987,8 +1989,10 @@ inline_to_all_callers (struct cgraph_node *node, void *data) { if (dump_file) fprintf (dump_file, "New calls found; giving up.\n"); - return true; + return callee_removed; } + if (callee_removed) + return true; } return false; } @@ -2107,8 +2111,9 @@ ipa_inline (void) int num_calls = 0; cgraph_for_node_and_aliases (node, sum_callers, &num_calls, true); - cgraph_for_node_and_aliases (node, inline_to_all_callers, - &num_calls, true); + while (cgraph_for_node_and_aliases (node, inline_to_all_callers, + &num_calls, true)) + ; remove_functions = true; } } diff --git a/gcc/ipa-inline.h b/gcc/ipa-inline.h index 8ee075f..7860dec 100644 --- a/gcc/ipa-inline.h +++ b/gcc/ipa-inline.h @@ -234,7 +234,8 @@ void compute_inline_parameters (struct cgraph_node *, bool); bool speculation_useful_p (struct cgraph_edge *e, bool anticipate_inlining); /* In ipa-inline-transform.c */ -bool inline_call (struct cgraph_edge *, bool, vec *, int *, bool); +bool inline_call (struct cgraph_edge *, bool, vec *, int *, bool, + bool *callee_removed = NULL); unsigned int inline_transform (struct cgraph_node *); void clone_inlined_nodes (struct cgraph_edge *e, bool, bool, int *, int freq_scale); diff --git a/gcc/ipa-prop.c b/gcc/ipa-prop.c index 9f144fa..9f45c76 100644 --- a/gcc/ipa-prop.c +++ b/gcc/ipa-prop.c @@ -2877,16 +2877,20 @@ update_indirect_edges_after_inlining (struct cgraph_edge *cs, else if (jfunc->type == IPA_JF_PASS_THROUGH && ipa_get_jf_pass_through_operation (jfunc) == NOP_EXPR) { - if (ici->agg_contents - && !ipa_get_jf_pass_through_agg_preserved (jfunc)) + if ((ici->agg_contents + && !ipa_get_jf_pass_through_agg_preserved (jfunc)) + || (ici->polymorphic + && !ipa_get_jf_pass_through_type_preserved (jfunc))) ici->param_index = -1; else ici->param_index = ipa_get_jf_pass_through_formal_id (jfunc); } else if (jfunc->type == IPA_JF_ANCESTOR) { - if (ici->agg_contents - && !ipa_get_jf_ancestor_agg_preserved (jfunc)) + if ((ici->agg_contents + && !ipa_get_jf_ancestor_agg_preserved (jfunc)) + || (ici->polymorphic + && !ipa_get_jf_ancestor_type_preserved (jfunc))) ici->param_index = -1; else { @@ -3650,6 +3654,7 @@ ipa_modify_formal_parameters (tree fndecl, ipa_parm_adjustment_vec adjustments) TREE_TYPE (fndecl) = new_type; DECL_VIRTUAL_P (fndecl) = 0; + DECL_LANG_SPECIFIC (fndecl) = NULL; otypes.release (); oparms.release (); } diff --git a/gcc/ipa.c b/gcc/ipa.c index 26e9b03..ebaa82d 100644 --- a/gcc/ipa.c +++ b/gcc/ipa.c @@ -415,7 +415,18 @@ symtab_remove_unreachable_nodes (bool before_inlining_p, FILE *file) || !DECL_EXTERNAL (e->callee->decl) || e->callee->alias || before_inlining_p)) - pointer_set_insert (reachable, e->callee); + { + /* Be sure that we will not optimize out alias target + body. */ + if (DECL_EXTERNAL (e->callee->decl) + && e->callee->alias + && before_inlining_p) + { + pointer_set_insert (reachable, + cgraph_function_node (e->callee)); + } + pointer_set_insert (reachable, e->callee); + } enqueue_node (e->callee, &first, reachable); } @@ -506,6 +517,7 @@ symtab_remove_unreachable_nodes (bool before_inlining_p, FILE *file) if (!node->in_other_partition) node->local.local = false; cgraph_node_remove_callees (node); + symtab_remove_from_same_comdat_group (node); ipa_remove_all_references (&node->ref_list); changed = true; } @@ -561,6 +573,8 @@ symtab_remove_unreachable_nodes (bool before_inlining_p, FILE *file) vnode->analyzed = false; vnode->aux = NULL; + symtab_remove_from_same_comdat_group (vnode); + /* Keep body if it may be useful for constant folding. */ if ((init = ctor_for_folding (vnode->decl)) == error_mark_node) varpool_remove_initializer (vnode); @@ -697,6 +711,8 @@ address_taken_from_non_vtable_p (symtab_node *node) static bool comdat_can_be_unshared_p_1 (symtab_node *node) { + if (!node->externally_visible) + return true; /* When address is taken, we don't know if equality comparison won't break eventually. Exception are virutal functions, C++ constructors/destructors and vtables, where this is not possible by diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c index 648806b..43006f7 100644 --- a/gcc/ira-costs.c +++ b/gcc/ira-costs.c @@ -407,6 +407,8 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, int alt; int i, j, k; int insn_allows_mem[MAX_RECOG_OPERANDS]; + move_table *move_in_cost, *move_out_cost; + short (*mem_cost)[2]; for (i = 0; i < n_ops; i++) insn_allows_mem[i] = 0; @@ -517,41 +519,78 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, bool in_p = recog_data.operand_type[i] != OP_OUT; bool out_p = recog_data.operand_type[i] != OP_IN; enum reg_class op_class = classes[i]; - move_table *move_in_cost, *move_out_cost; ira_init_register_move_cost_if_necessary (mode); if (! in_p) { ira_assert (out_p); - move_out_cost = ira_may_move_out_cost[mode]; - for (k = cost_classes_ptr->num - 1; k >= 0; k--) + if (op_class == NO_REGS) { - rclass = cost_classes[k]; - pp_costs[k] - = move_out_cost[op_class][rclass] * frequency; + mem_cost = ira_memory_move_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] = mem_cost[rclass][0] * frequency; + } + } + else + { + move_out_cost = ira_may_move_out_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] + = move_out_cost[op_class][rclass] * frequency; + } } } else if (! out_p) { ira_assert (in_p); - move_in_cost = ira_may_move_in_cost[mode]; - for (k = cost_classes_ptr->num - 1; k >= 0; k--) + if (op_class == NO_REGS) { - rclass = cost_classes[k]; - pp_costs[k] - = move_in_cost[rclass][op_class] * frequency; + mem_cost = ira_memory_move_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] = mem_cost[rclass][1] * frequency; + } + } + else + { + move_in_cost = ira_may_move_in_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] + = move_in_cost[rclass][op_class] * frequency; + } } } else { - move_in_cost = ira_may_move_in_cost[mode]; - move_out_cost = ira_may_move_out_cost[mode]; - for (k = cost_classes_ptr->num - 1; k >= 0; k--) + if (op_class == NO_REGS) { - rclass = cost_classes[k]; - pp_costs[k] = ((move_in_cost[rclass][op_class] - + move_out_cost[op_class][rclass]) - * frequency); + mem_cost = ira_memory_move_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] = ((mem_cost[rclass][0] + + mem_cost[rclass][1]) + * frequency); + } + } + else + { + move_in_cost = ira_may_move_in_cost[mode]; + move_out_cost = ira_may_move_out_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] = ((move_in_cost[rclass][op_class] + + move_out_cost[op_class][rclass]) + * frequency); + } } } @@ -762,10 +801,11 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, into that class. */ if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER) { - if (classes[i] == NO_REGS) + if (classes[i] == NO_REGS && ! allows_mem[i]) { /* We must always fail if the operand is a REG, but - we did not find a suitable class. + we did not find a suitable class and memory is + not allowed. Otherwise we may perform an uninitialized read from this_op_costs after the `continue' statement @@ -782,51 +822,94 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, bool in_p = recog_data.operand_type[i] != OP_OUT; bool out_p = recog_data.operand_type[i] != OP_IN; enum reg_class op_class = classes[i]; - move_table *move_in_cost, *move_out_cost; ira_init_register_move_cost_if_necessary (mode); if (! in_p) { ira_assert (out_p); - move_out_cost = ira_may_move_out_cost[mode]; - for (k = cost_classes_ptr->num - 1; k >= 0; k--) + if (op_class == NO_REGS) { - rclass = cost_classes[k]; - pp_costs[k] - = move_out_cost[op_class][rclass] * frequency; + mem_cost = ira_memory_move_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] = mem_cost[rclass][0] * frequency; + } + } + else + { + move_out_cost = ira_may_move_out_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] + = move_out_cost[op_class][rclass] * frequency; + } } } else if (! out_p) { ira_assert (in_p); - move_in_cost = ira_may_move_in_cost[mode]; - for (k = cost_classes_ptr->num - 1; k >= 0; k--) + if (op_class == NO_REGS) + { + mem_cost = ira_memory_move_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] = mem_cost[rclass][1] * frequency; + } + } + else { - rclass = cost_classes[k]; - pp_costs[k] - = move_in_cost[rclass][op_class] * frequency; + move_in_cost = ira_may_move_in_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] + = move_in_cost[rclass][op_class] * frequency; + } } } else { - move_in_cost = ira_may_move_in_cost[mode]; - move_out_cost = ira_may_move_out_cost[mode]; - for (k = cost_classes_ptr->num - 1; k >= 0; k--) + if (op_class == NO_REGS) { - rclass = cost_classes[k]; - pp_costs[k] = ((move_in_cost[rclass][op_class] - + move_out_cost[op_class][rclass]) - * frequency); + mem_cost = ira_memory_move_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] = ((mem_cost[rclass][0] + + mem_cost[rclass][1]) + * frequency); + } + } + else + { + move_in_cost = ira_may_move_in_cost[mode]; + move_out_cost = ira_may_move_out_cost[mode]; + for (k = cost_classes_ptr->num - 1; k >= 0; k--) + { + rclass = cost_classes[k]; + pp_costs[k] = ((move_in_cost[rclass][op_class] + + move_out_cost[op_class][rclass]) + * frequency); + } } } - /* If the alternative actually allows memory, make - things a bit cheaper since we won't need an extra - insn to load it. */ - pp->mem_cost - = ((out_p ? ira_memory_move_cost[mode][op_class][0] : 0) - + (in_p ? ira_memory_move_cost[mode][op_class][1] : 0) - - allows_mem[i]) * frequency; + if (op_class == NO_REGS) + /* Although we don't need insn to reload from + memory, still accessing memory is usually more + expensive than a register. */ + pp->mem_cost = frequency; + else + /* If the alternative actually allows memory, make + things a bit cheaper since we won't need an + extra insn to load it. */ + pp->mem_cost + = ((out_p ? ira_memory_move_cost[mode][op_class][0] : 0) + + (in_p ? ira_memory_move_cost[mode][op_class][1] : 0) + - allows_mem[i]) * frequency; /* If we have assigned a class to this allocno in our first pass, add a cost to this alternative corresponding to what we would add if this @@ -836,15 +919,28 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops, enum reg_class pref_class = pref[COST_INDEX (REGNO (op))]; if (pref_class == NO_REGS) + { + if (op_class != NO_REGS) + alt_cost + += ((out_p + ? ira_memory_move_cost[mode][op_class][0] + : 0) + + (in_p + ? ira_memory_move_cost[mode][op_class][1] + : 0)); + } + else if (op_class == NO_REGS) alt_cost += ((out_p - ? ira_memory_move_cost[mode][op_class][0] : 0) + ? ira_memory_move_cost[mode][pref_class][1] + : 0) + (in_p - ? ira_memory_move_cost[mode][op_class][1] + ? ira_memory_move_cost[mode][pref_class][0] : 0)); else if (ira_reg_class_intersect[pref_class][op_class] == NO_REGS) - alt_cost += ira_register_move_cost[mode][pref_class][op_class]; + alt_cost += (ira_register_move_cost + [mode][pref_class][op_class]); } } } diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c index abdf697..2787820 100644 --- a/gcc/lra-eliminations.c +++ b/gcc/lra-eliminations.c @@ -565,6 +565,16 @@ lra_eliminate_regs_1 (rtx insn, rtx x, enum machine_mode mem_mode, alter_subreg (&x, false); return x; } + else if (! subst_p) + { + /* LRA can transform subregs itself. So don't call + simplify_gen_subreg until LRA transformations are + finished. Function simplify_gen_subreg can do + non-trivial transformations (like truncation) which + might make LRA work to fail. */ + SUBREG_REG (x) = new_rtx; + return x; + } else return simplify_gen_subreg (GET_MODE (x), new_rtx, GET_MODE (new_rtx), SUBREG_BYTE (x)); diff --git a/gcc/lto/ChangeLog b/gcc/lto/ChangeLog index b396e48..47a5924 100644 --- a/gcc/lto/ChangeLog +++ b/gcc/lto/ChangeLog @@ -1,3 +1,8 @@ +2014-04-22 Jan Hubicka + + PR lto/61012 + * lto-symtab.c (lto_symtab_merge_decls_1): + 2014-04-22 Release Manager * GCC 4.9.0 released. diff --git a/gcc/lto/lto-symtab.c b/gcc/lto/lto-symtab.c index 71242c8..e77448e 100644 --- a/gcc/lto/lto-symtab.c +++ b/gcc/lto/lto-symtab.c @@ -453,7 +453,12 @@ lto_symtab_merge_decls_1 (symtab_node *first) cgraph or a varpool node. */ if (!prevailing) { - prevailing = first; + for (prevailing = first; + prevailing; prevailing = prevailing->next_sharing_asm_name) + if (lto_symtab_symbol_p (prevailing)) + break; + if (!prevailing) + return; /* For variables chose with a priority variant with vnode attached (i.e. from unit where external declaration of variable is actually used). diff --git a/gcc/omp-low.c b/gcc/omp-low.c index 26e4849..99f79ba 100644 --- a/gcc/omp-low.c +++ b/gcc/omp-low.c @@ -3000,6 +3000,27 @@ lower_rec_simd_input_clauses (tree new_var, omp_context *ctx, int &max_vf, return true; } +/* Helper function of lower_rec_input_clauses. For a reference + in simd reduction, add an underlying variable it will reference. */ + +static void +handle_simd_reference (location_t loc, tree new_vard, gimple_seq *ilist) +{ + tree z = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (new_vard))); + if (TREE_CONSTANT (z)) + { + const char *name = NULL; + if (DECL_NAME (new_vard)) + name = IDENTIFIER_POINTER (DECL_NAME (new_vard)); + + z = create_tmp_var_raw (TREE_TYPE (TREE_TYPE (new_vard)), name); + gimple_add_tmp_var (z); + TREE_ADDRESSABLE (z) = 1; + z = build_fold_addr_expr_loc (loc, z); + gimplify_assign (new_vard, z, ilist); + } +} + /* Generate code to implement the input clauses, FIRSTPRIVATE and COPYIN, from the receiver (aka child) side and initializers for REFERENCE_TYPE private variables. Initialization statements go in ILIST, while calls @@ -3191,13 +3212,11 @@ lower_rec_input_clauses (tree clauses, gimple_seq *ilist, gimple_seq *dlist, } else if (TREE_CONSTANT (x)) { - /* For reduction with placeholder in SIMD loop, - defer adding the initialization of the reference, - because if we decide to use SIMD array for it, - the initilization could cause expansion ICE. */ - if (c_kind == OMP_CLAUSE_REDUCTION - && OMP_CLAUSE_REDUCTION_PLACEHOLDER (c) - && is_simd) + /* For reduction in SIMD loop, defer adding the + initialization of the reference, because if we decide + to use SIMD array for it, the initilization could cause + expansion ICE. */ + if (c_kind == OMP_CLAUSE_REDUCTION && is_simd) x = NULL_TREE; else { @@ -3526,23 +3545,7 @@ lower_rec_input_clauses (tree clauses, gimple_seq *ilist, gimple_seq *dlist, But if they aren't used, we need to emit the deferred initialization now. */ else if (is_reference (var) && is_simd) - { - tree z - = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (new_vard))); - if (TREE_CONSTANT (z)) - { - const char *name = NULL; - if (DECL_NAME (var)) - name = IDENTIFIER_POINTER (DECL_NAME (new_vard)); - - z = create_tmp_var_raw - (TREE_TYPE (TREE_TYPE (new_vard)), name); - gimple_add_tmp_var (z); - TREE_ADDRESSABLE (z) = 1; - z = build_fold_addr_expr_loc (clause_loc, z); - gimplify_assign (new_vard, z, ilist); - } - } + handle_simd_reference (clause_loc, new_vard, ilist); x = lang_hooks.decls.omp_clause_default_ctor (c, new_var, unshare_expr (x)); if (x) @@ -3575,6 +3578,13 @@ lower_rec_input_clauses (tree clauses, gimple_seq *ilist, gimple_seq *dlist, if (code == MINUS_EXPR) code = PLUS_EXPR; + tree new_vard = new_var; + if (is_simd && is_reference (var)) + { + gcc_assert (TREE_CODE (new_var) == MEM_REF); + new_vard = TREE_OPERAND (new_var, 0); + gcc_assert (DECL_P (new_vard)); + } if (is_simd && lower_rec_simd_input_clauses (new_var, ctx, max_vf, idx, lane, ivar, lvar)) @@ -3586,9 +3596,18 @@ lower_rec_input_clauses (tree clauses, gimple_seq *ilist, gimple_seq *dlist, x = build2 (code, TREE_TYPE (ref), ref, ivar); ref = build_outer_var_ref (var, ctx); gimplify_assign (ref, x, &llist[1]); + + if (new_vard != new_var) + { + SET_DECL_VALUE_EXPR (new_vard, + build_fold_addr_expr (lvar)); + DECL_HAS_VALUE_EXPR_P (new_vard) = 1; + } } else { + if (is_reference (var) && is_simd) + handle_simd_reference (clause_loc, new_vard, ilist); gimplify_assign (new_var, x, ilist); if (is_simd) { diff --git a/gcc/opts.c b/gcc/opts.c index 3f3db1a..bbd6b9c 100644 --- a/gcc/opts.c +++ b/gcc/opts.c @@ -1501,9 +1501,9 @@ common_handle_option (struct gcc_options *opts, } if (! found) - warning_at (loc, 0, - "unrecognized argument to -fsanitize= option: %q.*s", - (int) len, p); + error_at (loc, + "unrecognized argument to -fsanitize= option: %q.*s", + (int) len, p); if (comma == NULL) break; @@ -1740,7 +1740,7 @@ common_handle_option (struct gcc_options *opts, /* FIXME: Instrumentation we insert makes ipa-reference bitmaps quadratic. Disable the pass until better memory representation is done. */ - if (!opts_set->x_flag_ipa_reference && opts->x_in_lto_p) + if (!opts_set->x_flag_ipa_reference) opts->x_flag_ipa_reference = false; break; @@ -1820,13 +1820,8 @@ common_handle_option (struct gcc_options *opts, break; case OPT_g: - /* -g by itself should force -g2. */ - if (*arg == '\0') - set_debug_level (NO_DEBUG, DEFAULT_GDB_EXTENSIONS, "2", opts, opts_set, - loc); - else - set_debug_level (NO_DEBUG, DEFAULT_GDB_EXTENSIONS, arg, opts, opts_set, - loc); + set_debug_level (NO_DEBUG, DEFAULT_GDB_EXTENSIONS, arg, opts, opts_set, + loc); break; case OPT_gcoff: @@ -2076,10 +2071,12 @@ set_debug_level (enum debug_info_type type, int extended, const char *arg, opts_set->x_write_symbols = type; } - /* A debug flag without a level defaults to level 2. */ + /* A debug flag without a level defaults to level 2. + If off or at level 1, set it to level 2, but if already + at level 3, don't lower it. */ if (*arg == '\0') { - if (!opts->x_debug_info_level) + if (opts->x_debug_info_level < DINFO_LEVEL_NORMAL) opts->x_debug_info_level = DINFO_LEVEL_NORMAL; } else diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog index d9af0fe..631f64a 100644 --- a/gcc/po/ChangeLog +++ b/gcc/po/ChangeLog @@ -1,3 +1,7 @@ +2014-05-14 Joseph Myers + + * zh_CN.po: Update. + 2014-05-01 Joseph Myers * sv.po: Update. diff --git a/gcc/po/zh_CN.po b/gcc/po/zh_CN.po index 7edfcb4..e20e43f 100644 --- a/gcc/po/zh_CN.po +++ b/gcc/po/zh_CN.po @@ -1,14 +1,14 @@ # Simplified Chinese translation for gcc. # Copyright (C) 2005 Free Software Foundation, Inc. # This file is distributed under the same license as the gcc package. -# Meng Jie , 2005-2011. +# Meng Jie , 2005-2014. # msgid "" msgstr "" -"Project-Id-Version: gcc 4.6.0\n" +"Project-Id-Version: gcc 4.9-b20140202\n" "Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n" "POT-Creation-Date: 2014-02-02 17:35+0000\n" -"PO-Revision-Date: 2011-05-19 15:04+0800\n" +"PO-Revision-Date: 2014-05-14 14:25-0800\n" "Last-Translator: Meng Jie \n" "Language-Team: Chinese (simplified) \n" "Language: zh_CN\n" @@ -38,7 +38,6 @@ msgstr "return 后没有屏障" #: collect2.c:1578 #, fuzzy, c-format -#| msgid "collect2 version %s" msgid "collect2 version %s\n" msgstr "collect2 版本 %s" @@ -94,13 +93,11 @@ msgstr "常量/复制传递被禁用" #: diagnostic.c:170 #, fuzzy, c-format -#| msgid "%s: all warnings being treated as errors\n" msgid "%s: all warnings being treated as errors" msgstr "%s：所有的警告都被当作是错误\n" #: diagnostic.c:175 #, fuzzy, c-format -#| msgid "%s: some warnings being treated as errors\n" msgid "%s: some warnings being treated as errors" msgstr "%s：有些警告被当作是错误\n" @@ -120,10 +117,6 @@ msgstr "编译中止因为 -fmax-errors=%u。\n" #: diagnostic.c:479 #, fuzzy, c-format -#| msgid "" -#| "Please submit a full bug report,\n" -#| "with preprocessed source if appropriate.\n" -#| "See %s for instructions.\n" msgid "" "Please submit a full bug report,\n" "with preprocessed source if appropriate.\n" @@ -134,7 +127,6 @@ msgstr "" #: diagnostic.c:485 #, fuzzy, c-format -#| msgid "Use fp double instructions" msgid "See %s for instructions.\n" msgstr "使用浮点双精度指令" @@ -293,7 +285,6 @@ msgstr " --target-help 显示目标机器特定的命令行选项\n" #: gcc.c:3073 #, fuzzy -#| msgid " --help={target|optimizers|warnings|params|[^]{joined|separate|undocumented}}[,...]\n" msgid " --help={common|optimizers|params|target|warnings|[^]{joined|separate|undocumented}}[,...]\n" msgstr " --help={target|optimizers|warnings|params|[^]{joined|separate|undocumented}}[,...]\n" @@ -339,9 +330,6 @@ msgstr " -print-prog-name=<程序> 显示编译器组件 <程序> 的完整路 #: gcc.c:3085 #, fuzzy -#| msgid "" -#| " -print-multi-lib Display the mapping between command line options and\n" -#| " multiple library search directories\n" msgid "" " -print-multiarch Display the target's normalized GNU triplet, used as\n" " a component in the library path\n" @@ -461,13 +449,11 @@ msgstr " -o <文件> 输出到 <文件>\n" #: gcc.c:3120 #, fuzzy -#| msgid "Create a position independent executable" msgid " -pie Create a position independent executable\n" msgstr "生成位置无关可执行文件" #: gcc.c:3121 #, fuzzy -#| msgid "Create a shared library" msgid " -shared Create a shared library\n" msgstr "生成一个共享库" @@ -497,7 +483,6 @@ msgstr "" #: gcc.c:5402 #, fuzzy, c-format -#| msgid "Processing spec %c%s%c, which is '%s'\n" msgid "Processing spec (%s), which is '%s'\n" msgstr "处理 spec %c%s%c，即‘%s’\n" @@ -613,9 +598,6 @@ msgstr "" #: gcov.c:472 #, fuzzy, c-format -#| msgid "" -#| "Usage: gcov [OPTION]... SOURCEFILE...\n" -#| "\n" msgid "" "Usage: gcov [OPTION]... SOURCE|OBJ...\n" "\n" @@ -649,9 +631,6 @@ msgstr " -b, --branch-probabilities 输出包含分支概率\n" #: gcov.c:477 #, fuzzy, c-format -#| msgid "" -#| " -c, --branch-counts Given counts of branches taken\n" -#| " rather than percentages\n" msgid "" " -c, --branch-counts Output counts of branches taken\n" " rather than percentages\n" @@ -701,7 +680,6 @@ msgstr " -p, --preserve-paths 保留所有路径名\n" #: gcov.c:488 #, fuzzy, c-format -#| msgid " -a, --all-blocks Show information for every basic block\n" msgid " -r, --relative-only Only show data for relative sources\n" msgstr " -a, --all-blocks 显示每个基本块的信息\n" @@ -749,25 +727,21 @@ msgstr "" #: gcov.c:794 #, fuzzy, c-format -#| msgid "%s:creating '%s'\n" msgid "Creating '%s'\n" msgstr "%s：正在创建‘%s’\n" #: gcov.c:797 #, fuzzy, c-format -#| msgid "%s:error writing output file '%s'\n" msgid "Error writing output file '%s'\n" msgstr "%s：写入输出文件‘%s’时出错\n" #: gcov.c:801 #, fuzzy, c-format -#| msgid "%s:could not open output file '%s'\n" msgid "Could not open output file '%s'\n" msgstr "%s：不能打开输出文件‘%s’\n" #: gcov.c:806 #, fuzzy, c-format -#| msgid "[Leaving %s]\n" msgid "Removing '%s'\n" msgstr "[离开 %s]\n" @@ -778,13 +752,11 @@ msgstr "\n" #: gcov.c:856 #, fuzzy, c-format -#| msgid "%s: Cannot open output file: %s\n" msgid "Cannot open intermediate output file %s\n" msgstr "%s：无法打开输出文件：%s\n" #: gcov.c:1139 #, fuzzy, c-format -#| msgid "%s:source file is newer than graph file '%s'\n" msgid "%s:source file is newer than notes file '%s'\n" msgstr "%s：源文件较图文件‘%s’新\n" @@ -795,13 +767,11 @@ msgstr "(每个源文件只显示一条信息)\n" #: gcov.c:1169 #, fuzzy, c-format -#| msgid "%s:cannot open source file\n" msgid "%s:cannot open notes file\n" msgstr "%s：无法打开源文件\n" #: gcov.c:1175 #, fuzzy, c-format -#| msgid "%s:not a gcov data file\n" msgid "%s:not a gcov notes file\n" msgstr "%s：不是一个 gcov 数据文件\n" @@ -842,7 +812,6 @@ msgstr "%s：版本‘%.4s’，首选版本‘%.4s’\n" #: gcov.c:1417 #, fuzzy, c-format -#| msgid "%s:stamp mismatch with graph file\n" msgid "%s:stamp mismatch with notes file\n" msgstr "%s：时间戳与图文件不匹配\n" @@ -958,7 +927,6 @@ msgstr "无条件 %2d 从未执行\n" #: gcov.c:2424 #, fuzzy, c-format -#| msgid "%s:cannot open source file\n" msgid "Cannot open source file %s\n" msgstr "%s：无法打开源文件\n" @@ -1109,13 +1077,11 @@ msgstr "在函数%qs中" #: langhooks.c:456 cp/error.c:3131 #, fuzzy -#| msgid " inlined from %qs at %s:%d:%d" msgid " inlined from %qs at %r%s:%d:%d%R" msgstr " 内联自%qs于 %s:%d:%d" #: langhooks.c:461 cp/error.c:3136 #, fuzzy -#| msgid " inlined from %qs at %s:%d" msgid " inlined from %qs at %r%s:%d%R" msgstr " 内联自%qs于 %s:%d" @@ -1419,7 +1385,6 @@ msgstr "不考虑内联函数" #: cif-code.def:43 #, fuzzy -#| msgid "%qE is not initialized" msgid "caller is not optimized" msgstr "%qE未经初始化" @@ -1437,7 +1402,6 @@ msgstr "函数不能内联" #: cif-code.def:60 #, fuzzy -#| msgid "function body can be overwriten at linktime" msgid "function body can be overwritten at link time" msgstr "函数体可能在链接时被改写" @@ -1499,7 +1463,6 @@ msgstr "" #: cif-code.def:113 #, fuzzy -#| msgid "Enable exception handling" msgid "non-call exception handling mismatch" msgstr "启用异常处理" @@ -1602,7 +1565,6 @@ msgstr "早期内联器可以进行的嵌套间接内联的最大数量" #: params.def:117 #, fuzzy -#| msgid "Probability that COMDAT function will be shared with different compilatoin unit" msgid "Probability that COMDAT function will be shared with different compilation unit" msgstr "与其他编译单元共享 COMDAT 函数的概率" @@ -1632,7 +1594,6 @@ msgstr "调度候选操作列表的最大长度" #: params.def:175 #, fuzzy -#| msgid "The maximum number of instructions to consider to unroll in a loop" msgid "The maximum number of backtrack attempts the scheduler should make when modulo scheduling a loop" msgstr "单个循环中考虑展开的最大指令数" @@ -1719,7 +1680,6 @@ msgstr "单个循环最大的剥离数" #: params.def:300 #, fuzzy -#| msgid "The maximum number of iterations through CFG to extend regions" msgid "The maximum number of branches on the path through the peeled sequence" msgstr "通过 CFG 以扩展区域的最大循环次数" @@ -2152,7 +2112,6 @@ msgstr "为实现跳转提示插入的 nop 的最大数(默认 2)" #: params.def:980 #, fuzzy -#| msgid "Maximum number of times that an insn could be scheduled" msgid "Maximum number of conditional store pairs that can be sunk" msgstr "指定一条指令最多能被调度几次" @@ -2170,13 +2129,11 @@ msgstr "" #: params.def:1006 #, fuzzy -#| msgid "Allow branches to be packed with other instructions" msgid "Allow new data races on packed data loads to be introduced" msgstr "允许跳转与其他指令打包在一起" #: params.def:1011 #, fuzzy -#| msgid "Allow branches to be packed with other instructions" msgid "Allow new data races on packed data stores to be introduced" msgstr "允许跳转与其他指令打包在一起" @@ -2206,31 +2163,26 @@ msgstr "" #: params.def:1054 #, fuzzy -#| msgid "Enable stack probing" msgid "Enable asan stack protection" msgstr "启用堆栈探测" #: params.def:1059 #, fuzzy -#| msgid "Enable all optional instructions" msgid "Enable asan globals protection" msgstr "启用所有可选指令" #: params.def:1064 #, fuzzy -#| msgid "Enable saturation instructions" msgid "Enable asan store operations protection" msgstr "启用饱和指令" #: params.def:1069 #, fuzzy -#| msgid "Enable all optional instructions" msgid "Enable asan load operations protection" msgstr "启用所有可选指令" #: params.def:1074 params.def:1079 #, fuzzy -#| msgid "Enable saturation instructions" msgid "Enable asan builtin functions protection" msgstr "启用饱和指令" @@ -2510,7 +2462,6 @@ msgstr "<命令行>" #: config/aarch64/aarch64.c:3487 config/arm/arm.c:21114 config/arm/arm.c:21127 #: config/nios2/nios2.c:1885 #, fuzzy, c-format -#| msgid "invalid operand for code '%c'" msgid "Unsupported operand for code '%c'" msgstr "代码‘%c’的操作数无效" @@ -2519,7 +2470,6 @@ msgstr "代码‘%c’的操作数无效" #: config/aarch64/aarch64.c:3551 config/aarch64/aarch64.c:3567 #: config/aarch64/aarch64.c:3586 config/aarch64/aarch64.c:3625 #, fuzzy, c-format -#| msgid "invalid operand for code '%c'" msgid "invalid operand for '%%%c'" msgstr "代码‘%c’的操作数无效" @@ -2535,19 +2485,16 @@ msgstr "缺少操作数" #: config/aarch64/aarch64.c:3724 #, fuzzy, c-format -#| msgid "invalid insn:" msgid "invalid constant" msgstr "无效指令：" #: config/aarch64/aarch64.c:3727 #, fuzzy, c-format -#| msgid "invalid %%d operand" msgid "invalid operand" msgstr "无效的 %%d 操作数" #: config/aarch64/aarch64.c:3815 #, fuzzy, c-format -#| msgid "invalid operand code '%c'" msgid "invalid operand prefix '%%%c'" msgstr "无效的操作数代码‘%c’" @@ -2637,19 +2584,16 @@ msgstr "无效的 %%xn 代码" #: config/arc/arc.c:2782 #, fuzzy, c-format -#| msgid "invalid operand to %%R code" msgid "invalid operand to %%Z code" msgstr "%%R 代码的操作数无效" #: config/arc/arc.c:2790 #, fuzzy, c-format -#| msgid "invalid operand to %%R code" msgid "invalid operand to %%z code" msgstr "%%R 代码的操作数无效" #: config/arc/arc.c:2798 #, fuzzy, c-format -#| msgid "invalid operand to %%R code" msgid "invalid operand to %%M code" msgstr "%%R 代码的操作数无效" @@ -2675,7 +2619,6 @@ msgstr "%%V 代码的操作数无效" #: config/arc/arc.c:3099 #, fuzzy, c-format -#| msgid "invalid operand to %%R code" msgid "invalid operand to %%O code" msgstr "%%R 代码的操作数无效" @@ -2689,7 +2632,6 @@ msgstr "无效的操作数输出代码" #: config/arc/arc.c:4676 #, fuzzy, c-format -#| msgid "invalid UNSPEC as operand" msgid "invalid UNSPEC as operand: %d" msgstr "无效的 UNSPEC 用作操作数" @@ -2749,19 +2691,16 @@ msgstr "地址操作数需要 X、Y 或 Z 寄存器约束" #: config/avr/avr.c:2140 #, fuzzy -#| msgid "output operand %d must use %<&%> constraint" msgid "operands to %T/%t must be reg + const_int:" msgstr "输出操作数 %d 必须使用%<&%>约束" #: config/avr/avr.c:2180 config/avr/avr.c:2235 #, fuzzy -#| msgid "bad address, not (reg+disp):" msgid "bad address, not an I/O address:" msgstr "地址错误，不是(reg+disp)：" #: config/avr/avr.c:2189 #, fuzzy -#| msgid "bad address, not a constant):" msgid "bad address, not a constant:" msgstr "错误的地址，不是一个常量)：" @@ -2813,7 +2752,6 @@ msgstr "编译器内部错误。不正确的移位量：" #: config/avr/avr.c:7100 #, fuzzy -#| msgid "invalid types in fixed-point conversion" msgid "unsupported fixed-point conversion" msgstr "整点转换中类型无效" @@ -3058,25 +2996,21 @@ msgstr "无效的 UNSPEC 用作操作数" #: config/i386/i386.c:14839 #, fuzzy, c-format -#| msgid "invalid operand size for operand code '%c'" msgid "invalid operand size for operand code 'O'" msgstr "操作数代码‘%c’的操作数大小无效" #: config/i386/i386.c:14874 #, fuzzy, c-format -#| msgid "invalid operand size for operand code '%c'" msgid "invalid operand size for operand code 'z'" msgstr "操作数代码‘%c’的操作数大小无效" #: config/i386/i386.c:14944 #, fuzzy, c-format -#| msgid "invalid operand type used with operand code '%c'" msgid "invalid operand type used with operand code 'Z'" msgstr "操作数代码‘%c’的操作数类型无效" #: config/i386/i386.c:14949 #, fuzzy, c-format -#| msgid "invalid operand size for operand code '%c'" msgid "invalid operand size for operand code 'Z'" msgstr "操作数代码‘%c’的操作数大小无效" @@ -3092,13 +3026,11 @@ msgstr "操作数不是一个条件码，无效的操作数代码‘D’" #: config/i386/i386.c:15115 #, fuzzy, c-format -#| msgid "operand is not a condition code, invalid operand code 'D'" msgid "operand is not a condition code, invalid operand code '%c'" msgstr "操作数不是一个条件码，无效的操作数代码‘D’" #: config/i386/i386.c:15128 #, fuzzy, c-format -#| msgid "operand is not a condition code, invalid operand code 'D'" msgid "operand is not an offsettable memory reference, invalid operand code 'H'" msgstr "操作数不是一个条件码，无效的操作数代码‘D’" @@ -3127,7 +3059,6 @@ msgstr "使用本地 (MS) 位段存储方式" #: config/i386/i386-interix.h:78 #, fuzzy -#| msgid "Use native (MS) bitfield layout" msgid "Use gcc default bitfield layout" msgstr "使用本地 (MS) 位段存储方式" @@ -3343,7 +3274,6 @@ msgstr "MMIX 内部错误：这不是一个常量：" #: config/msp430/msp430.c:2130 #, fuzzy, c-format -#| msgid "invalid reference prefix" msgid "invalid operand prefix" msgstr "无效的引用前缀" @@ -3404,7 +3334,6 @@ msgstr "-mno-altivec 禁用了 VSX" #: config/rs6000/rs6000.c:3363 #, fuzzy -#| msgid "--resource requires -o" msgid "-mquad-memory requires 64-bit mode" msgstr "--resource 需要 -o" @@ -3414,7 +3343,6 @@ msgstr "" #: config/rs6000/rs6000.c:3378 #, fuzzy -#| msgid "Generate code in little endian mode" msgid "-mquad-memory is not available in little endian mode" msgstr "生成小端在前的代码" @@ -3503,13 +3431,11 @@ msgstr "传递 AltiVec 参数给无原型的函数" #: config/rs6000/rs6000.c:32382 #, fuzzy -#| msgid "Do not generate a single exit point for each function" msgid "Could not generate addis value for fusion" msgstr "不为每个函数生成单一的退出点" #: config/rs6000/rs6000.c:32441 #, fuzzy -#| msgid "unable to generate reloads for:" msgid "Unable to generate load offset for fusion" msgstr "无法生成重新载入，为：" @@ -3638,13 +3564,11 @@ msgstr "无效的 %%B 操作数" #: config/sparc/sparc.c:8830 config/tilegx/tilegx.c:5061 #: config/tilepro/tilepro.c:4516 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%C operand" msgstr "无效的 %%P 操作数" #: config/sparc/sparc.c:8847 config/tilegx/tilegx.c:5094 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%D operand" msgstr "无效的 %%P 操作数" @@ -3700,49 +3624,41 @@ msgstr "无效的 %%d 操作数" #: config/tilegx/tilegx.c:5174 #, fuzzy, c-format -#| msgid "invalid %%L code" msgid "invalid %%H specifier" msgstr "无效 %%L 代码" #: config/tilegx/tilegx.c:5216 config/tilepro/tilepro.c:4530 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%h operand" msgstr "无效的 %%P 操作数" #: config/tilegx/tilegx.c:5228 config/tilepro/tilepro.c:4594 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%I operand" msgstr "无效的 %%P 操作数" #: config/tilegx/tilegx.c:5242 config/tilepro/tilepro.c:4608 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%i operand" msgstr "无效的 %%P 操作数" #: config/tilegx/tilegx.c:5265 config/tilepro/tilepro.c:4631 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%j operand" msgstr "无效的 %%P 操作数" #: config/tilegx/tilegx.c:5296 #, fuzzy, c-format -#| msgid "invalid %%c operand" msgid "invalid %%%c operand" msgstr "无效的 %%c 操作数" #: config/tilegx/tilegx.c:5311 config/tilepro/tilepro.c:4745 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%N operand" msgstr "无效的 %%P 操作数" #: config/tilegx/tilegx.c:5355 #, fuzzy, c-format -#| msgid "invalid operand for 'b' modifier" msgid "invalid operand for 'r' specifier" msgstr "‘b’修饰符的操作数无效" @@ -3753,37 +3669,31 @@ msgstr "" #: config/tilepro/tilepro.c:4566 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%H operand" msgstr "无效的 %%P 操作数" #: config/tilepro/tilepro.c:4670 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%L operand" msgstr "无效的 %%P 操作数" #: config/tilepro/tilepro.c:4730 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%M operand" msgstr "无效的 %%P 操作数" #: config/tilepro/tilepro.c:4773 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%t operand" msgstr "无效的 %%P 操作数" #: config/tilepro/tilepro.c:4780 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%t operand '" msgstr "无效的 %%P 操作数" #: config/tilepro/tilepro.c:4801 #, fuzzy, c-format -#| msgid "invalid %%P operand" msgid "invalid %%r operand" msgstr "无效的 %%P 操作数" @@ -4057,13 +3967,11 @@ msgstr "{匿名}" #: cp/error.c:1060 #, fuzzy -#| msgid "(anonymous)" msgid "(anonymous namespace)" msgstr "(匿名)" #: cp/error.c:1169 #, fuzzy -#| msgid "