From 93a1fc2e18b452216be70f534da42f7702adbe1d Mon Sep 17 00:00:00 2001 From: Amara Emerson Date: Wed, 30 Sep 2020 17:35:53 -0700 Subject: [PATCH] Try to fix build. May have used a C++ feature too new/not supported on all platforms. --- llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp index 206e409..b6a006e 100644 --- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp @@ -23,6 +23,7 @@ #include "llvm/CodeGen/ValueTypes.h" #include "llvm/IR/DerivedTypes.h" #include "llvm/IR/Type.h" +#include #define DEBUG_TYPE "aarch64-legalinfo" @@ -54,11 +55,12 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) const LLT v2s64 = LLT::vector(2, 64); const LLT v2p0 = LLT::vector(2, p0); - const auto PackedVectorAllTypeList = {/* Begin 128bit types */ - v16s8, v8s16, v4s32, v2s64, v2p0, - /* End 128bit types */ - /* Begin 64bit types */ - v8s8, v4s16, v2s32}; + std::initializer_list PackedVectorAllTypeList = {/* Begin 128bit types */ + v16s8, v8s16, v4s32, + v2s64, v2p0, + /* End 128bit types */ + /* Begin 64bit types */ + v8s8, v4s16, v2s32}; const TargetMachine &TM = ST.getTargetLowering()->getTargetMachine(); -- 2.7.4