From 9351c91f40706f39bf93d2b1d878616824fff554 Mon Sep 17 00:00:00 2001 From: Thomas Ingleby Date: Thu, 10 Jul 2014 01:14:24 +0100 Subject: [PATCH] intel_galileo_rev_d: add uart definitions. Signed-off-by: Thomas Ingleby --- src/intel_galileo_rev_d.c | 58 +++++++++++++++++++++++++++++++---------------- 1 file changed, 38 insertions(+), 20 deletions(-) diff --git a/src/intel_galileo_rev_d.c b/src/intel_galileo_rev_d.c index a8a8e83..ae0d70d 100644 --- a/src/intel_galileo_rev_d.c +++ b/src/intel_galileo_rev_d.c @@ -38,6 +38,8 @@ mraa_intel_galileo_rev_d() b->phy_pin_count = 20; b->gpio_count = 14; b->aio_count = 6; + b->uart_dev_count = 2; + b->adc_raw = 12; b->adc_supported = 10; @@ -45,22 +47,32 @@ mraa_intel_galileo_rev_d() //GPIO IO0 - IO10 strncpy(b->pins[0].name, "IO0", 8); - b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1}; b->pins[0].gpio.pinmap = 50; b->pins[0].gpio.parent_id = 0; b->pins[0].gpio.mux_total = 1; b->pins[0].gpio.mux[0].pin = 40; b->pins[0].gpio.mux[0].value = 1; + b->pins[0].uart.pinmap = 0; + b->pins[0].uart.parent_id = 0; + b->pins[0].uart.mux_total = 1; + b->pins[0].uart.mux[0].pin = 40; + b->pins[0].uart.mux[0].value = 0; strncpy(b->pins[1].name, "IO1", 8); - b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,1}; b->pins[1].gpio.pinmap = 51; b->pins[1].gpio.mux_total = 1; b->pins[1].gpio.mux[0].pin = 41; b->pins[1].gpio.mux[0].value = 1; + b->pins[1].uart.pinmap = 0; + b->pins[1].uart.parent_id = 0; + b->pins[1].uart.mux_total = 1; + b->pins[1].uart.mux[0].pin = 41; + b->pins[1].uart.mux[0].value = 0; strncpy(b->pins[2].name, "IO2", 8); - b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0}; + b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0,0}; b->pins[2].gpio.pinmap = 32; b->pins[2].gpio.mux_total = 1; b->pins[2].gpio.mux[0].pin = 31; @@ -76,7 +88,7 @@ mraa_intel_galileo_rev_d() b->pins[2].mmap.bit_pos = 6; strncpy(b->pins[3].name, "IO3", 8); - b->pins[3].capabilites = (mraa_pincapabilities_t) {1,1,1,1,0,0,0}; + b->pins[3].capabilites = (mraa_pincapabilities_t) {1,1,1,1,0,0,0,0}; b->pins[3].gpio.pinmap = 18; b->pins[3].gpio.mux_total = 1; b->pins[3].gpio.mux[0].pin = 30; @@ -98,12 +110,12 @@ mraa_intel_galileo_rev_d() strncpy(b->pins[4].name, "IO4", 8); - b->pins[4].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[4].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0}; b->pins[4].gpio.pinmap = 28; b->pins[4].gpio.mux_total = 0; strncpy(b->pins[5].name, "IO5", 8); - b->pins[5].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0}; + b->pins[5].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0}; b->pins[5].gpio.pinmap = 17; b->pins[5].gpio.mux_total = 0; b->pins[5].pwm.pinmap = 5; @@ -112,24 +124,24 @@ mraa_intel_galileo_rev_d() strncpy(b->pins[6].name, "IO6", 8); b->pins[6].gpio.pinmap = 24; - b->pins[6].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0}; + b->pins[6].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0}; b->pins[6].gpio.mux_total = 0; b->pins[6].pwm.pinmap = 6; b->pins[6].pwm.parent_id = 0; b->pins[6].pwm.mux_total = 0; strncpy(b->pins[7].name, "IO7", 8); - b->pins[7].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[7].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0}; b->pins[7].gpio.pinmap = 27; b->pins[7].gpio.mux_total = 0; strncpy(b->pins[8].name, "IO8", 8); - b->pins[8].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[8].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0,0}; b->pins[8].gpio.pinmap = 26; b->pins[8].gpio.mux_total = 0; strncpy(b->pins[9].name, "IO9", 8); - b->pins[9].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0}; + b->pins[9].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0,0}; b->pins[9].gpio.pinmap = 19; b->pins[9].gpio.mux_total = 0; b->pins[9].pwm.pinmap = 1; @@ -137,7 +149,7 @@ mraa_intel_galileo_rev_d() b->pins[9].pwm.mux_total = 0; strncpy(b->pins[10].name, "IO10", 8); - b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0}; + b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0,0}; b->pins[10].gpio.pinmap = 16; b->pins[10].gpio.mux_total = 1; b->pins[10].gpio.mux[0].pin = 42; @@ -153,7 +165,7 @@ mraa_intel_galileo_rev_d() b->pins[10].spi.mux[0].value = 0; strncpy(b->pins[11].name, "IO11", 8); - b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0}; + b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0,0}; b->pins[11].gpio.pinmap = 25; b->pins[11].gpio.mux_total = 1; b->pins[11].gpio.mux[0].pin = 43; @@ -169,7 +181,7 @@ mraa_intel_galileo_rev_d() b->pins[11].spi.mux[0].value = 0; strncpy(b->pins[12].name, "IO12", 8); - b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0}; + b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0}; b->pins[12].gpio.pinmap = 38; b->pins[12].gpio.mux_total = 1; b->pins[12].gpio.mux[0].pin = 54; @@ -180,7 +192,7 @@ mraa_intel_galileo_rev_d() b->pins[12].spi.mux[0].value = 0; strncpy(b->pins[13].name, "IO13", 8); - b->pins[13].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0}; + b->pins[13].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0,0}; b->pins[13].gpio.pinmap = 39; b->pins[13].gpio.mux_total = 1; b->pins[13].gpio.mux[0].pin = 55; @@ -191,7 +203,7 @@ mraa_intel_galileo_rev_d() b->pins[13].spi.mux[0].value = 0; strncpy(b->pins[14].name, "A0", 8); - b->pins[14].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1}; + b->pins[14].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0}; b->pins[14].gpio.pinmap = 44; b->pins[14].gpio.mux_total = 1; b->pins[14].gpio.mux[0].pin = 37; @@ -202,7 +214,7 @@ mraa_intel_galileo_rev_d() b->pins[14].aio.mux[0].value = 0; strncpy(b->pins[15].name, "A1", 8); - b->pins[15].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1}; + b->pins[15].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0}; b->pins[15].gpio.pinmap = 45; b->pins[15].gpio.mux_total = 1; b->pins[15].gpio.mux[0].pin = 36; @@ -213,7 +225,7 @@ mraa_intel_galileo_rev_d() b->pins[15].aio.mux[0].value = 0; strncpy(b->pins[16].name, "A2", 8); - b->pins[16].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1}; + b->pins[16].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0}; b->pins[16].gpio.pinmap = 46; b->pins[16].gpio.mux_total = 1; b->pins[16].gpio.mux[0].pin = 23; @@ -224,7 +236,7 @@ mraa_intel_galileo_rev_d() b->pins[16].aio.mux[0].value = 0; strncpy(b->pins[17].name, "A3", 8); - b->pins[17].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1}; + b->pins[17].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1,0}; b->pins[17].gpio.pinmap = 47; b->pins[17].gpio.mux_total = 1; b->pins[17].gpio.mux[0].pin = 22; @@ -235,7 +247,7 @@ mraa_intel_galileo_rev_d() b->pins[17].aio.mux[0].value = 0; strncpy(b->pins[18].name, "A4", 8); - b->pins[18].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1}; + b->pins[18].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1,0}; b->pins[18].gpio.pinmap = 48; b->pins[18].gpio.mux_total = 2; b->pins[18].gpio.mux[0].pin = 29; @@ -254,7 +266,7 @@ mraa_intel_galileo_rev_d() b->pins[18].aio.mux[1].value = 0; strncpy(b->pins[19].name, "A5", 8); - b->pins[19].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1}; + b->pins[19].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1,0}; b->pins[19].gpio.pinmap = 49; b->pins[19].gpio.mux_total = 2; b->pins[19].gpio.mux[0].pin = 29; @@ -288,5 +300,11 @@ mraa_intel_galileo_rev_d() b->spi_bus[0].miso = 12; b->spi_bus[0].sclk = 13; + b->def_uart_dev = 0; + b->uart_dev[0].rx = 0; + b->uart_dev[0].tx = 1; + b->uart_dev[1].rx = -1; + b->uart_dev[1].tx = -1; + return b; } -- 2.7.4