From 934e5d54369fbac3b78ee252a5178580b589d5fd Mon Sep 17 00:00:00 2001 From: Petr Hosek Date: Sun, 1 Apr 2018 23:44:04 +0000 Subject: [PATCH] [AArch64] Reserve x18 register on Fuchsia This register is reserved as a platform register on Fuchsia. Differential Revision: https://reviews.llvm.org/D45105 llvm-svn: 328950 --- llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 4 ++-- llvm/test/CodeGen/AArch64/aarch64-named-reg-w18.ll | 4 +--- llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll | 4 +--- llvm/test/CodeGen/AArch64/arm64-platform-reg.ll | 1 + 4 files changed, 5 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp index c03b459..5f3a265 100644 --- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp +++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp @@ -151,8 +151,8 @@ AArch64Subtarget::AArch64Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian) : AArch64GenSubtargetInfo(TT, CPU, FS), - ReserveX18(TT.isOSDarwin() || TT.isOSWindows()), IsLittle(LittleEndian), - TargetTriple(TT), FrameLowering(), + ReserveX18(TT.isOSDarwin() || TT.isOSFuchsia() || TT.isOSWindows()), + IsLittle(LittleEndian), TargetTriple(TT), FrameLowering(), InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(), TLInfo(TM, *this) { CallLoweringInfo.reset(new AArch64CallLowering(*getTargetLowering())); diff --git a/llvm/test/CodeGen/AArch64/aarch64-named-reg-w18.ll b/llvm/test/CodeGen/AArch64/aarch64-named-reg-w18.ll index 341c768..0e6aef6 100644 --- a/llvm/test/CodeGen/AArch64/aarch64-named-reg-w18.ll +++ b/llvm/test/CodeGen/AArch64/aarch64-named-reg-w18.ll @@ -1,10 +1,8 @@ -; RUN: not llc -mtriple=aarch64-fuchsia -o - %s 2>&1 | FileCheck %s --check-prefix=ERROR -; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x18 -o - %s +; RUN: llc -mtriple=aarch64-fuchsia -o - %s define void @set_w18(i32 %x) { entry: ; FIXME: Include an allocatable-specific error message -; ERROR: Invalid register name "w18". tail call void @llvm.write_register.i32(metadata !0, i32 %x) ret void } diff --git a/llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll b/llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll index eed8527..9074f2c 100644 --- a/llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll +++ b/llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll @@ -1,10 +1,8 @@ -; RUN: not llc -mtriple=aarch64-fuchsia -o - %s 2>&1 | FileCheck %s --check-prefix=ERROR -; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x18 -o - %s +; RUN: llc -mtriple=aarch64-fuchsia -o - %s define void @set_x18(i64 %x) { entry: ; FIXME: Include an allocatable-specific error message -; ERROR: Invalid register name "x18". tail call void @llvm.write_register.i64(metadata !0, i64 %x) ret void } diff --git a/llvm/test/CodeGen/AArch64/arm64-platform-reg.ll b/llvm/test/CodeGen/AArch64/arm64-platform-reg.ll index 9b5d8a8..a492772 100644 --- a/llvm/test/CodeGen/AArch64/arm64-platform-reg.ll +++ b/llvm/test/CodeGen/AArch64/arm64-platform-reg.ll @@ -1,6 +1,7 @@ ; RUN: llc -mtriple=arm64-apple-ios -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18 ; RUN: llc -mtriple=arm64-freebsd-gnu -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s +; RUN: llc -mtriple=aarch64-fuchsia -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18 ; RUN: llc -mtriple=aarch64-windows -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18 ; x18 is reserved as a platform register on Darwin but not on other -- 2.7.4