From 9310668fb60a7ee76c4fdfd6388747a6f2beaf75 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Wed, 5 May 2021 23:37:37 +0200 Subject: [PATCH] mtd: rawnand: Retrieve NV-DDR timing modes from the ONFI parameter page When parsing the ONFI parameter page, save the available NV-DDR timing modes in the core's dynamic ONFI structure. Once available to the rest of the core out of the ONFI driver, these values will then be used to derive the best timing mode. Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-10-miquel.raynal@bootlin.com --- drivers/mtd/nand/raw/nand_onfi.c | 2 ++ include/linux/mtd/onfi.h | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/mtd/nand/raw/nand_onfi.c b/drivers/mtd/nand/raw/nand_onfi.c index 0230345..f7a4a05 100644 --- a/drivers/mtd/nand/raw/nand_onfi.c +++ b/drivers/mtd/nand/raw/nand_onfi.c @@ -316,6 +316,8 @@ int nand_onfi_detect(struct nand_chip *chip) onfi->tR = le16_to_cpu(p->t_r); onfi->tCCS = le16_to_cpu(p->t_ccs); onfi->sdr_timing_modes = le16_to_cpu(p->sdr_timing_modes); + if (p->features & ONFI_FEATURE_NV_DDR) + onfi->nvddr_timing_modes = p->nvddr_timing_modes; onfi->vendor_revision = le16_to_cpu(p->vendor_revision); memcpy(onfi->vendor, p->vendor, sizeof(p->vendor)); chip->parameters.onfi = onfi; diff --git a/include/linux/mtd/onfi.h b/include/linux/mtd/onfi.h index 319e173..14e66a4 100644 --- a/include/linux/mtd/onfi.h +++ b/include/linux/mtd/onfi.h @@ -25,6 +25,7 @@ /* ONFI features */ #define ONFI_FEATURE_16_BIT_BUS BIT(0) +#define ONFI_FEATURE_NV_DDR BIT(5) #define ONFI_FEATURE_EXT_PARAM_PAGE BIT(7) /* ONFI timing mode, used in both asynchronous and synchronous mode */ @@ -162,6 +163,7 @@ struct onfi_ext_param_page { * @tR: Page read time * @tCCS: Change column setup time * @sdr_timing_modes: Supported asynchronous/SDR timing modes + * @nvddr_timing_modes: Supported source synchronous/NV-DDR timing modes * @vendor_revision: Vendor specific revision number * @vendor: Vendor specific data */ @@ -172,6 +174,7 @@ struct onfi_params { u16 tR; u16 tCCS; u16 sdr_timing_modes; + u16 nvddr_timing_modes; u16 vendor_revision; u8 vendor[88]; }; -- 2.7.4