From 91e217d4b6ea3903f6052fa1fd5179037171b2a5 Mon Sep 17 00:00:00 2001 From: Alexandre Mergnat Date: Wed, 29 Mar 2023 10:54:33 +0200 Subject: [PATCH] arm64: dts: mediatek: add ethernet support for mt8365 SoC This IP is a 10/100 MAC controller compliant with IEEE 802.3 standards. It supports power management with Energy Efficient Ethernet and Wake-on-LAN specification. Flow control is provided for half-duplex and full-duplex mode. For packet transmission and reception, the controller supports IPv4/UDP/TCP checksum offload and VLAN tag insertion. Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230203-evk-board-support-v3-12-0003e80e0095@baylibre.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 2a56997..1f6b483 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -427,6 +427,18 @@ status = "disabled"; }; + ethernet: ethernet@112a0000 { + compatible = "mediatek,mt8365-eth"; + reg = <0 0x112a0000 0 0x1000>; + mediatek,pericfg = <&infracfg>; + interrupts = ; + clocks = <&topckgen CLK_TOP_ETH_SEL>, + <&infracfg CLK_IFR_NIC_AXI>, + <&infracfg CLK_IFR_NIC_SLV_AXI>; + clock-names = "core", "reg", "trans"; + status = "disabled"; + }; + u3phy: t-phy@11cc0000 { compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>; -- 2.7.4