From 91276b60597128ee4eb7219091d7bd65b386e2ed Mon Sep 17 00:00:00 2001 From: "xingyu.wu" Date: Tue, 19 Apr 2022 21:27:13 +0800 Subject: [PATCH] driver:watchdog:Add config definition to different uses of board level 1. The watchdog driver can get different rate from clock by different board. 2. arch:riscv:Kconfig: Adjust the format. Signed-off-by: Xingyu Wu --- arch/riscv/Kconfig.socs | 30 +++++++++++++++--------------- drivers/watchdog/starfive-wdt.c | 12 +++++++----- 2 files changed, 22 insertions(+), 20 deletions(-) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 741303e..cb87acd 100755 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -96,26 +96,26 @@ config USB_CDNS3_HOST_FLUSH_DMA endmenu choice - prompt "StarFive JH SOCs board type" - depends on SOC_STARFIVE - default STARFIVE_FPGA + prompt "StarFive JH SOCs board type" + depends on SOC_STARFIVE + default STARFIVE_BOARD_FPGA help - choice StarFive JH7110 SOC board type + choice StarFive JH7110 SOC board type - config STARFIVE_BOARD_FPGA - bool "FPGA" - help - This enables support for StarFive SoC FPGA board type Hardware. + config STARFIVE_BOARD_FPGA + bool "FPGA" + help + This enables support for StarFive SoC FPGA board type Hardware. - config STARFIVE_BOARD_EVB - bool "EVB" - help - This enables support for StarFive SoC EVB board type Hardware. + config STARFIVE_BOARD_EVB + bool "EVB" + help + This enables support for StarFive SoC EVB board type Hardware. config STARFIVE_BOARD_VISIONFIVE - bool "Visionfive" - help - This enables support for StarFive SoC Visionfive board type Hardware. + bool "Visionfive" + help + This enables support for StarFive SoC Visionfive board type Hardware. endchoice config SOC_VIRT diff --git a/drivers/watchdog/starfive-wdt.c b/drivers/watchdog/starfive-wdt.c index 26b79ad..d05a668 100755 --- a/drivers/watchdog/starfive-wdt.c +++ b/drivers/watchdog/starfive-wdt.c @@ -200,14 +200,10 @@ MODULE_DEVICE_TABLE(platform, si5wdt_ids); static int si5wdt_get_clock_rate(struct stf_si5_wdt *wdt) { +#ifdef CONFIG_STARFIVE_BOARD_FPGA int ret; u32 freq; - if (!IS_ERR(wdt->core_clk)) { - wdt->freq = clk_get_rate(wdt->core_clk); - return 0; - } - /* Next we try to get clock-frequency from dts.*/ ret = of_property_read_u32(wdt->dev->of_node, "clock-frequency", &freq); if (!ret) { @@ -216,6 +212,12 @@ static int si5wdt_get_clock_rate(struct stf_si5_wdt *wdt) } else dev_err(wdt->dev, "get rate failed, need clock-frequency define in dts.\n"); +#else + if (!IS_ERR(wdt->core_clk)) { + wdt->freq = clk_get_rate(wdt->core_clk); + return 0; + } +#endif return -ENOENT; } -- 2.7.4