From 90c3d78f51581b466fe2f5f3a626f9f398774d35 Mon Sep 17 00:00:00 2001 From: Tamar Christina Date: Thu, 10 Jan 2019 03:27:13 +0000 Subject: [PATCH] target-supports.exp (check_effective_target_arm_v8_3a_complex_neon_ok_nocache, [...]): New. gcc/testsuite/ChangeLog: 2019-01-10 Tamar Christina * lib/target-supports.exp (check_effective_target_arm_v8_3a_complex_neon_ok_nocache, check_effective_target_arm_v8_3a_complex_neon_ok, add_options_for_arm_v8_3a_complex_neon, check_effective_target_arm_v8_3a_complex_neon_hw, check_effective_target_vect_complex_rot_N): New. From-SVN: r267794 --- gcc/testsuite/ChangeLog | 9 +++ gcc/testsuite/lib/target-supports.exp | 108 ++++++++++++++++++++++++++++++++++ 2 files changed, 117 insertions(+) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a1786d1..ef7d0f8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2019-01-10 Tamar Christina + + * lib/target-supports.exp + (check_effective_target_arm_v8_3a_complex_neon_ok_nocache, + check_effective_target_arm_v8_3a_complex_neon_ok, + add_options_for_arm_v8_3a_complex_neon, + check_effective_target_arm_v8_3a_complex_neon_hw, + check_effective_target_vect_complex_rot_N): New. + 2019-01-09 Steven G. Kargl PR fortran/88376 diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index a3cf1c9..88fbc8d 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -9064,3 +9064,111 @@ proc check_effective_target_inf { } { const double pinf = __builtin_inf (); }] } + +# Return 1 if the target supports ARMv8.3 Adv.SIMD Complex instructions +# instructions, 0 otherwise. The test is valid for ARM and for AArch64. +# Record the command line options needed. + +proc check_effective_target_arm_v8_3a_complex_neon_ok_nocache { } { + global et_arm_v8_3a_complex_neon_flags + set et_arm_v8_3a_complex_neon_flags "" + + if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } { + return 0; + } + + # Iterate through sets of options to find the compiler flags that + # need to be added to the -march option. + foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} { + if { [check_no_compiler_messages_nocache \ + arm_v8_3a_complex_neon_ok object { + #if !defined (__ARM_FEATURE_COMPLEX) + #error "__ARM_FEATURE_COMPLEX not defined" + #endif + } "$flags -march=armv8.3-a"] } { + set et_arm_v8_3a_complex_neon_flags "$flags -march=armv8.3-a" + return 1 + } + } + + return 0; +} + +proc check_effective_target_arm_v8_3a_complex_neon_ok { } { + return [check_cached_effective_target arm_v8_3a_complex_neon_ok \ + check_effective_target_arm_v8_3a_complex_neon_ok_nocache] +} + +proc add_options_for_arm_v8_3a_complex_neon { flags } { + if { ! [check_effective_target_arm_v8_3a_complex_neon_ok] } { + return "$flags" + } + global et_arm_v8_3a_complex_neon_flags + return "$flags $et_arm_v8_3a_complex_neon_flags" +} + +# Return 1 if the target supports executing AdvSIMD instructions from ARMv8.3 +# with the complex instruction extension, 0 otherwise. The test is valid for +# ARM and for AArch64. + +proc check_effective_target_arm_v8_3a_complex_neon_hw { } { + if { ![check_effective_target_arm_v8_3a_complex_neon_ok] } { + return 0; + } + return [check_runtime arm_v8_3a_complex_neon_hw_available { + #include "arm_neon.h" + int + main (void) + { + + float32x2_t results = {-4.0,5.0}; + float32x2_t a = {1.0,3.0}; + float32x2_t b = {2.0,5.0}; + + #ifdef __ARM_ARCH_ISA_A64 + asm ("fcadd %0.2s, %1.2s, %2.2s, #90" + : "=w"(results) + : "w"(a), "w"(b) + : /* No clobbers. */); + + #else + asm ("vcadd.f32 %P0, %P1, %P2, #90" + : "=w"(results) + : "w"(a), "w"(b) + : /* No clobbers. */); + #endif + + return (results[0] == 8 && results[1] == 24) ? 1 : 0; + } + } [add_options_for_arm_v8_3a_complex_neon ""]] +} + +# Return 1 if the target plus current options supports a vector +# complex addition with rotate of half and single float modes, 0 otherwise. +# +# This won't change for different subtargets so cache the result. + +foreach N {hf sf} { + eval [string map [list N $N] { + proc check_effective_target_vect_complex_rot_N { } { + return [check_cached_effective_target_indexed vect_complex_rot_N { + expr { [istarget aarch64*-*-*] + || [istarget arm*-*-*] }}] + } + }] +} + +# Return 1 if the target plus current options supports a vector +# complex addition with rotate of double float modes, 0 otherwise. +# +# This won't change for different subtargets so cache the result. + +foreach N {df} { + eval [string map [list N $N] { + proc check_effective_target_vect_complex_rot_N { } { + return [check_cached_effective_target_indexed vect_complex_rot_N { + expr { [istarget aarch64*-*-*] }}] + } + }] +} + -- 2.7.4