From 8fea8032366ae71d46d4b357a53181d9bac44ce9 Mon Sep 17 00:00:00 2001 From: Sergey Andreenko Date: Fri, 31 Aug 2018 16:16:57 -0700 Subject: [PATCH] Fix callKillSet for CORINFO_HELP_ASSIGN_BYREF on x64. (dotnet/coreclr#19780) * Fix callKillSet for CORINFO_HELP_ASSIGN_BYREF. on x64. * Fix typos. Commit migrated from https://github.com/dotnet/coreclr/commit/d71ed81a4b9ec9d89bcb5c35174ff60d0991c79c --- src/coreclr/src/jit/codegencommon.cpp | 22 +++++++++++++--------- src/coreclr/src/vm/amd64/jithelpers_fast.S | 6 ++++-- 2 files changed, 17 insertions(+), 11 deletions(-) diff --git a/src/coreclr/src/jit/codegencommon.cpp b/src/coreclr/src/jit/codegencommon.cpp index e4ba8e6..b1b780f 100644 --- a/src/coreclr/src/jit/codegencommon.cpp +++ b/src/coreclr/src/jit/codegencommon.cpp @@ -639,6 +639,19 @@ regMaskTP Compiler::compNoGCHelperCallKillSet(CorInfoHelpFunc helper) switch (helper) { + case CORINFO_HELP_ASSIGN_BYREF: +#if defined(_TARGET_X86_) + // This helper only trashes ECX. + return RBM_ECX; +#elif defined(_TARGET_AMD64_) + // This uses and defs RDI and RSI. + return RBM_CALLEE_TRASH_NOGC & ~(RBM_RDI | RBM_RSI); +#elif defined(_TARGET_ARMARCH_) + return RBM_CALLEE_GCTRASH_WRITEBARRIER_BYREF; +#else + assert(!"unknown arch"); +#endif + #if defined(_TARGET_XARCH_) case CORINFO_HELP_PROF_FCN_ENTER: return RBM_PROFILER_ENTER_TRASH; @@ -650,16 +663,7 @@ regMaskTP Compiler::compNoGCHelperCallKillSet(CorInfoHelpFunc helper) return RBM_PROFILER_TAILCALL_TRASH; #endif // defined(_TARGET_XARCH_) -#if defined(_TARGET_X86_) - case CORINFO_HELP_ASSIGN_BYREF: - // This helper only trashes ECX. - return RBM_ECX; -#endif // defined(_TARGET_X86_) - #if defined(_TARGET_ARMARCH_) - case CORINFO_HELP_ASSIGN_BYREF: - return RBM_CALLEE_GCTRASH_WRITEBARRIER_BYREF; - case CORINFO_HELP_ASSIGN_REF: case CORINFO_HELP_CHECKED_ASSIGN_REF: return RBM_CALLEE_GCTRASH_WRITEBARRIER; diff --git a/src/coreclr/src/vm/amd64/jithelpers_fast.S b/src/coreclr/src/vm/amd64/jithelpers_fast.S index 37f4142..6f955b0 100644 --- a/src/coreclr/src/vm/amd64/jithelpers_fast.S +++ b/src/coreclr/src/vm/amd64/jithelpers_fast.S @@ -228,8 +228,10 @@ LEAF_END JIT_PatchedCodeLast, _TEXT // RSI - address of the data (source) // // Note: RyuJIT assumes that all volatile registers can be trashed by -// the CORINFO_HELP_ASSIGN_BYREF helper (i.e. JIT_ByRefWriteBarrier). -// The precise set is defined by RBM_CALLEE_TRASH. +// the CORINFO_HELP_ASSIGN_BYREF helper (i.e. JIT_ByRefWriteBarrier) +// except RDI and RSI. This helper uses and defines RDI and RSI, so +// they remain as live GC refs or byrefs, and are not killed. +// // // RCX is trashed // RAX is trashed -- 2.7.4